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Interface

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Interface forum

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Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] DP83822I: 822/826 Odd Nibble Detection disable for EtherCAT application

    Hillman Lin
    Hillman Lin
    Part Number: DP83822I For 822/826 PHYs, Odd Nibbles Detection register need to be disable in order to prevent unexpected link loss in EtherCAT application. DP83826PHY: Odd Nibble Detection could be disable by strap 1 CLKOUT/LED1 pin in enhanced…
    • over 1 year ago
    • Interface
    • Interface forum
  • [FAQ] Can Auto-negotiation link up with Force mode on 100mbps?

    Hillman Lin
    Hillman Lin
    • Answered
    • over 1 year ago
    • Interface
    • Interface forum
  • [FAQ] DP83822IF: Fiber Link Status

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Part Number: DP83822IF Other Parts Discussed in Thread: DP83822HF , The DP83822IF and DP83822HF are the fiber capable variants of the DP83822. Bit 2 in Register 0x0001 indicates link status for both Copper and Fiber modes of operation. In copper mode…
    • over 1 year ago
    • Interface
    • Interface forum
  • [FAQ] Extended Register Space Access for Ethernet PHYs

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Our Ethernet PHYs have a standard set of registers, 0x0-0x1F, that can be accessed in a straight forward fashion. Registers beyond 0x1F require a different approach to access. This FAQ is intended to provide a few examples on how to read/write these…
    • over 1 year ago
    • Interface
    • Interface forum
  • [FAQ] SN65DSI86: SN65DSI86 Resolution Guide

    Allison Noe
    Allison Noe
    Part Number: SN65DSI86 What display resolution will the SN65DSI86 support?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: What is the default mode of RGMII when using DP83867, shift or align?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83867E When bootstrapped to be in RGMII mode, DP83867 will be in shift mode by default; not align mode. The modes will be corroborated via Reg 0x32[1:0].
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83869HM: How to generate 125MHz on CLKOUT pin for DP83869

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83869HM DP83869HM needs an additional register to be written to enable CLKOUT modification. By default, this signal is a buffered version of the XI signal. Reg 0xC6 must have 0x10 written in order for the value in Reg 0x170[12:8] to take…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] TI Ethernet PHY Capacitive Coupling (Transformerless Operation)

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Other Parts Discussed in Thread: DP83869 Summary: All of our Industrial Ethernet PHYs support Transformer-less Operation via Capacitive Coupling except for the DP83867. The DP83867 does not support Transformer-less Operation. List of Industrial…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: Ethernet PHY SGMII Vdiff Upper and Lower Input Limits

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Part Number: DP83867E Other Parts Discussed in Thread: DP83869 The DP83867 and DP83869 both have the same Vdiff Upper and Lower Input Limits of: 100 mV and 800 mV
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] What capacitance should my ESD diode be?

    Ethan Sempsrott
    Ethan Sempsrott
    Other Parts Discussed in Thread: ESD2CANXL24-Q1 , ESD2CAN24-Q1 , ESD2CANFD24-Q1 , ESD122 What should be considered when selecting a diode with parasitic capacitance?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
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    TLIN1022-Q1: TLIN1022DRQ1, TLIN1022ADRQ1 Difference question. 0 Locked

    175 views
    1 reply
    Latest over 2 years ago
    by Sean Guo
  • Answered

    DP83867IS: Communication between 10Base and 1000Base. 0 Locked

    148 views
    1 reply
    Latest over 2 years ago
    by Hillman Lin
  • Suggested Answer

    DP83TD510E-EVM: Connecting different PHY to 510E-EVM 0 Locked

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    5 replies
    Latest over 2 years ago
    by Alvaro (Al-vuh-roe) Reyes
  • Suggested Answer

    DP83822H: Forced Link Mode Side Effects 0 Locked

    347 views
    3 replies
    Latest over 2 years ago
    by Alvaro (Al-vuh-roe) Reyes
  • Answered

    TMUXHS4212: For USB3.0 application 0 Locked

    128 views
    1 reply
    Latest over 2 years ago
    by Stanton Weaver
  • Answered

    DS110DF1610: The configuration file of the SIGCON 0 Locked

    200 views
    3 replies
    Latest over 2 years ago
    by Evan Mayhew
  • Answered

    DS90UB947-Q1: delay time 0 Locked

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    1 reply
    Latest over 2 years ago
    by Ben Dattilo
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    TCA8418: TCA8418 0 Locked

    460 views
    7 replies
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  • Suggested Answer

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    by Michael Ikwuyum
  • Suggested Answer

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    353 views
    1 reply
    Latest over 2 years ago
    by Parker Dodson
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    351 views
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    Latest over 2 years ago
    by Tyler Townsend
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    205 views
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    by Parker Dodson
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    P82B96: What buffer/repeated can I use between the Sx/Sy pins of two P82B96? 0 Locked

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    by Tyler Townsend
  • Answered

    MIL-STD1553B Transceiver 0 Locked

    271 views
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    Latest over 2 years ago
    by Michael Ikwuyum
  • Not Answered

    DP83TG720S-Q1: The register configuration file 0 Locked

    166 views
    1 reply
    Latest over 2 years ago
    by Hillman Lin
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    TUSB3410UARTPDK: [Case:710255]Technical Data Inquiry 0 Locked

    194 views
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    Latest over 2 years ago
    by Ryan Kitto
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    FFF alternate for UC5180CQ part. 0 Locked

    163 views
    1 reply
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    by Parker Dodson
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    DS90UB941AS-Q1: Questions about the 941AS splitter mode 0 Locked

    255 views
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    Latest over 2 years ago
    by Jack Scherlag
  • Suggested Answer

    SN65DSI84-Q1: Can SN65DSI84-Q1 support Side-by-side packing (Left/right full-frame from SOC) input and split the left video(for Display A) to LVDS A port output and Right video(for display B) to LVDS B port 0 Locked

    410 views
    3 replies
    Latest over 2 years ago
    by David (ASIC) Liu
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