TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Interface

Interface

Interface forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] DP83826E: How does pin 29 on DP83826 act depending on strap mode?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83826E DP83826 in Enhanced mode has a pin which is GPIO, pin 29. This pin can be an LED or can be used as CRS. When PHY is set in RMII mode, this pin can be reprogrammed to be LED or CRS. When MII is strapped, this pin is forced to be CRS…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83822I: How to use RMII repeater mode in DP83822?

    Hillman Lin
    Hillman Lin
    Part Number: DP83822I Could someone guide me on how to use DP83822 for RMII repeater mode?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83822I: Link up debug with DP83822

    Hillman Lin
    Hillman Lin
    Part Number: DP83822I
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83822I: 822/826 Odd Nibble Detection disable for EtherCAT application

    Hillman Lin
    Hillman Lin
    Part Number: DP83822I For 822/826 PHYs, Odd Nibbles Detection register need to be disable in order to prevent unexpected link loss in EtherCAT application. DP83826PHY: Odd Nibble Detection could be disable by strap 1 CLKOUT/LED1 pin in enhanced…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] Can Auto-negotiation link up with Force mode on 100mbps?

    Hillman Lin
    Hillman Lin
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83822IF: Fiber Link Status

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Part Number: DP83822IF Other Parts Discussed in Thread: DP83822HF , The DP83822IF and DP83822HF are the fiber capable variants of the DP83822. Bit 2 in Register 0x0001 indicates link status for both Copper and Fiber modes of operation. In copper mode…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] Extended Register Space Access for Ethernet PHYs

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Our Ethernet PHYs have a standard set of registers, 0x0-0x1F, that can be accessed in a straight forward fashion. Registers beyond 0x1F require a different approach to access. This FAQ is intended to provide a few examples on how to read/write these…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] SN65DSI86: SN65DSI86 Resolution Guide

    Allison Noe
    Allison Noe
    Part Number: SN65DSI86 What display resolution will the SN65DSI86 support?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: What is the default mode of RGMII when using DP83867, shift or align?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83867E When bootstrapped to be in RGMII mode, DP83867 will be in shift mode by default; not align mode. The modes will be corroborated via Reg 0x32[1:0].
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83869HM: How to generate 125MHz on CLKOUT pin for DP83869

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83869HM DP83869HM needs an additional register to be written to enable CLKOUT modification. By default, this signal is a buffered version of the XI signal. Reg 0xC6 must have 0x10 written in order for the value in Reg 0x170[12:8] to take…
    • over 2 years ago
    • Interface
    • Interface forum
<>

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Suggested Answer

    PCA9534A: reference design and application note to planning GPIO extender function 0 Locked

    402 views
    8 replies
    Latest over 2 years ago
    by Tyler Townsend
  • Not Answered

    TUSB1310A: Transceiver quality with legacy Intel chipset 0 Locked

    395 views
    11 replies
    Latest over 2 years ago
    by Brian Zhou
  • Not Answered

    TUSB8042A: TUSB8042A fail 0 Locked

    246 views
    3 replies
    Latest over 2 years ago
    by Brian Zhou
  • Suggested Answer

    DP83867CS: gM, Drive Level, Rneg, Vpp 0 Locked

    213 views
    2 replies
    Latest over 2 years ago
    by Gokul Koraganji
  • Answered

    TUSB212-Q1: Impact on DP/DM when VCC is not powered 0 Locked

    289 views
    1 reply
    Latest over 2 years ago
    by Brian Zhou
  • Suggested Answer

    HD3SS3212-Q1: HD3SS3212RKSRQ1 0 Locked

    513 views
    10 replies
    Latest over 2 years ago
    by Brian Zhou
  • Answered

    SN65DPHY440SS: In a CSI application, is it possible to invert N and P on both sides of the chip except for the clk ? 0 Locked

    418 views
    1 reply
    Latest over 2 years ago
    by David (ASIC) Liu
  • Suggested Answer

    SN65C3223E: SN65C3223E data rate 0 Locked

    208 views
    2 replies
    Latest over 2 years ago
    by Parker Dodson
  • Answered

    THVD1406: About /SHDN pin 0 Locked

    2144 views
    5 replies
    Latest over 2 years ago
    by Hide
  • Discussion

    SN65HVD33: overshoot and undershoot requirement for driver input Pin5 Locked

    217 views
    1 reply
    Latest over 2 years ago
    by Parker Dodson
  • Answered

    DP83867IR:DP83867IR: About reference clock input timing 0 Locked

    334 views
    3 replies
    Latest over 2 years ago
    by Gokul Koraganji
  • Answered

    DP83848J: Should I connect thermal pad to GROUND or left it unconnected ? 0 Locked

    234 views
    1 reply
    Latest over 2 years ago
    by Gokul Koraganji
  • Not Answered

    SDIO to 1Gbps Ethernet MAC/PHY Interface device 0 Locked

    1297 views
    1 reply
    Latest over 2 years ago
    by Gokul Koraganji
  • Not Answered

    DP83TC814R-Q1: DP83TC814R-Q1 support for strap configuration & termination resistors 0 Locked

    470 views
    1 reply
    Latest over 2 years ago
    by Gokul Koraganji
  • Answered

    TCA9538: Check if the address pins (A0/A1) of TCA9538PW can be floating 0 Locked

    269 views
    3 replies
    Latest over 2 years ago
    by Kevin Jiang1
  • Not Answered

    DS92LV18: Differencial to single-ended by using baluns 0 Locked

    236 views
    2 replies
    Latest over 2 years ago
    by Hidenori Shiraki
  • Suggested Answer

    DP83867CS: SNLA290 clarification 0 Locked

    269 views
    3 replies
    Latest over 2 years ago
    by Vikram Sharma
  • Suggested Answer

    Is there any ready made option to convert the FPD link III connection to HDMI display 0 Locked

    284 views
    1 reply
    Latest over 2 years ago
    by Casey McCrea
  • Suggested Answer

    DS90UB960-Q1: how to identify camera unplugged when using VC-ID 0 Locked

    305 views
    1 reply
    Latest over 2 years ago
    by Casey McCrea
  • Suggested Answer

    DS90UB924-Q1: Can DS90UB924-Q1 support openLDi balanced mode? 0 Locked

    281 views
    1 reply
    Latest over 2 years ago
    by Casey McCrea
<>