[FAQ] [H] Voltage Translators - Top Questions Answered

Quickly find solutions to common questions about voltage translation (level shifter) devices by clicking this link. This FAQ answers the most common questions asked about these devices …… ……… …

1. [FAQ] If the OE pin is asserted to maintain Hi-Z at the IO, will it disconnect the internal pull-up resistors in TXS devices?
   
2. [FAQ] Are there voltage level translation / level shifter device recommendations for the industry standard interfaces like GPIO, SPI, UART, I2C, MDIO, RGMII, I2S etc?
3. [FAQ] What are the power sequencing requirements for the translation device?
   
4. [FAQ] What should be done with unused I/O pins of the level translator devices?
5. [FAQ] Is there a naming convention for Level Shifters?

Input Parameters:

1. [FAQ] Is the reliability of a logic device affected by applying an input voltage larger than the supply (VCC)?
   
2. [FAQ] What is the impedance of the device's input pin? Is it CMOS or bipolar device?
   
3. [FAQ] Is it necessary to have pull-down( or pullup) resistor on the OE pin or can I connect it directly to TXS/ TXB supply?
   
4. [FAQ] Can I connect the OE pin to Vccb supply pin instead of Vcca for TXS, TXB devices?
   
5. [FAQ] What should be done with unused I/O pins of the level translator devices?
   
6. [FAQ] Why does my device not switch at VIH or VIL?
   
7. [FAQ] How do I size pull-up or pull-down resistors?
   
8. [FAQ] How do I terminate any unused channels of a logic device?
   
9. [FAQ] How does a slow or floating input affect a CMOS device?
   
10. [FAQ] Can the input voltage (Vi) to my logic device be higher than the supply voltage (Vcc)?
    
11. [FAQ] What is the TXS device internal resistor variation/ tolerance
12. [FAQ] What is a floating input or floating node?
13. [FAQ] What method is best used for estimating specification values between those given in the datasheet?
14. [FAQ] What are the performance specifications of the HCS logic family at 3.3V operation?
15. [FAQ] Do I still need pull-up/pull-down resistors with bus-hold circuitry? 

Output Parameters:

1. [FAQ] With Open-Drain outputs, can I ...use them to shift a logic voltage level? ...connect the outputs directly together? ...force a voltage node to zero?
2. [FAQ] What should be done with unused I/O pins of the level translator devices?
3. [FAQ] How do I determine the output voltage (VOH, VOL) or output current (IOH, IOL) of a CMOS logic device?
4. [FAQ] What is the maximum trace length that a logic device can drive?
5. [FAQ] What happens when I connect a logic device's output to a 50 ohm transmission line?
6. [FAQ] Can I connect two outputs from a CMOS logic device together directly?
7. [FAQ] How do I size pull-up or pull-down resistors?
8. [FAQ] What is the output voltage (VOH or VOL) when the output current is X or the supply voltage is Y?
9. [FAQ] How do I terminate any unused channels of a logic device?
10. [FAQ] What is the default output of a latched device? (Flip-Flop, latch, register)
11. [FAQ] What is the maximum capacitive load that a logic device can drive?
12. [FAQ] What is the output transition rate for a logic device?
13. [FAQ] What is the TXS device internal resistor variation/ tolerance
14. [FAQ] Can you pull-up an open-drain output to a higher voltage than the device's supply (VCC) voltage?
15. [FAQ] What is a floating input or floating node?
16. [FAQ] What's the difference between logic output types (push-pull, open-drain, 3-state)?
17. [FAQ] What method is best used for estimating specification values between those given in the datasheet?
18. [FAQ] What are the performance specifications of the HCS logic family at 3.3V operation?

Timing Parameters

1. [FAQ] What is the typical delay of a logic device in a particular logic family?
2. [FAQ] What is the difference in timing between gates in the same device? How much skew is expected within a given logic device? What is the part-to-part skew?
   
3. [FAQ] What is the maximum data rate (or operating frequency) for a logic gate or buffer?
4. [FAQ] What method is best used for estimating specification values between those given in the datasheet?
5. [FAQ] What is the output transition rate for a logic device?

Power and Thermals:

1. [FAQ] How do I Calculate Power Consumption or Current Consumption for my CMOS Logic Device?
2. [FAQ] What are the power sequencing requirements for the translation device?
3. [FAQ] Where do I connect the thermal pad of the logic QFN devices?
4. [FAQ] What is the maximum junction temperature (TJMAX) for a device?
5. [FAQ] Where do I find maximum power dissipation for a device?
6. [FAQ] How do I select a bypass capacitor for a CMOS logic device?

Quality and Manufacturing:

1. [FAQ] Why does a logic device's part number have an E4/G4 suffix?
2. [FAQ] When will TI End of Life (EOL) or Obsolete a certain logic device?
   
3. [FAQ] Are there voltage level translation / level shifter device recommendations for the industry standard interfaces like GPIO, SPI, UART, I2C, MDIO, RGMII, I2S etc?
4. [FAQ] Why do the leadframes look strongly oxidized or corroded?
5. [FAQ] What do the underside markings on a part mean?
6. [FAQ] What is the difference between TXS TXB and LSF devices?
7. [FAQ] What are the RHA numbers, codes or radiation testing ratings for my high reliability part number?
8. [FAQ] How do I find reliability data for a logic device?
9. [FAQ] Is part number X pin to pin compatible with part number Y?
10. [FAQ] How do I set up a TI.com device re-stock notification?
11. [FAQ] Where can I get a CAD symbol, soldering footprint, or 3D model for my device?
12. [FAQ] How will a logic device respond to a short or open circuit?
13. [FAQ] Why do some SOT package parts from TI have a pin that is not in the mechanical drawing?
14. [FAQ] What is the thickness of Gold (Au), Palladium (Pd), or Nickel (Ni) for TI's NiPdAu lead finish?

Simulation Models:

1. [FAQ] An IBIS model returns the error "syntax error, unexpected IdentToken, expected $end" - what is wrong?
   
2. [FAQ] How to import Logic SPICE models netlist into TINA-TI (Logic TINA-TI test benches)

Monostable Multivibrators:

1. [FAQ] How does a monostable multivibrator (one shot) work?
2. [FAQ] Why is there no PSpice model for a Monostable Multivibrator device?
3. [FAQ] What is the maximum output pulse length for a monostable multivibrator?
4. [FAQ] How stable is the output pulse length of a monostable multivibrator across changes in supply voltage?
5. [FAQ] How stable is the output pulse length of a monostable multivibrator across temperature?
6. [FAQ] How do I configure a monostable multivibrator's inputs for rising/falling edge triggering?
7. [FAQ] Can I connect the Cext pin to ground on a monostable multivibrator?
8. [FAQ] How do you determine the output pulse width and the 'K' value for a monostable multivibrator?
9. [FAQ] How do I terminate an unused channel of a monostable multivibrator (one shot)?

Logic Technology:

1. [FAQ] What's the difference between TTL and 5V CMOS logic?
   
2. [FAQ] What is the difference between IOFF and VCC isolation? What are the conditions to guarantee it?
   
3. [FAQ] Difference between Multiplexer/De-multiplexer and Analog Switch
   
4. [FAQ] What does 'partial power down' or 'Ioff' mean in the datasheet?
   
5. [FAQ] What is the difference between the SN74HCxx and the SN74HCxxA?
6. [FAQ] What's the difference between a buffered and unbuffered CMOS device?