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Frequent questions

  • [FAQ] AM13E23019: Is brownout reset supported on the AM13E230x devices and is it configurable?

    Part Number: AM13E23019 Hi experts, Is early brownout detection (with interrupt) possible? How to configure thresholds? "7.8.1 Power Management Unit (PMU): section in datasheet mentions "Brownout reset (BOR) supply monitor with early warning capability…

  • [FAQ] AM13E23019: AM13E230x: Issue with the sysconfig interface for timer configuration

    Part Number: AM13E23019 Other Parts Discussed in Thread: SYSCONFIG Hi experts, I wanted help with the Timer module configuration of the AM13E30x sysconfig. I open the example.syscfg and try to configure the timer, but notice the following issues:…

  • [FAQ] AM13E23019: List of FAQs for TI AM13E230x

    Part Number: AM13E23019 Other Parts Discussed in Thread: SYSCONFIG List of all FAQs for AM13E230x

  • [FAQ] AM2612: Unable to program on custom board

    Part Number: AM2612 Other Parts Discussed in Thread: UNIFLASH Hi Team, Customer is programming AM2612 on their own board, but it not works through Uniflash, could you please help to check the log and point out next step? Thanks. Uniflash log.…

  • [FAQ] AM263x/ AM263Px/ AM261x: What should I use in my multi-core application, IPC or Shared Memory?

    Part Number: AM2612 Hi experts, I see that the AM26x devices support Inter-Processor Communication between multiple R5F cores and include a mechanism to maintain shared memory across cores. What is recommended for my multi-core applications? When do…

  • [FAQ] MSPM33C321A: ARM Cortex-M33 VTOR Alignment Requirement

    Part Number: MSPM33C321A Per ARM architecture, VTOR must be aligned to: Alignment = Power of 2 ≥ (Number of vectors × 4) For MSPM33C321A: - ICTR register = 1 → Hardware supports 53 external IRQs (IRQ0- 52 ) - Total vectors = 16 (system exceptions…

  • [FAQ] MSPM0G3507: How to put the ISRs into SRAM for MSPM0 deivces

    Part Number: MSPM0G3507 Use function of DL_Interrupt_registerInterrupt to define all the interrupts that used.(This function will copy the vector table into SRAM then modify the interrupt offset address and modify the interrupt ISR entry address as…

  • [FAQ] MSPM0G3507: How to put the ISRs into SRAM for MSPM0 deivces

    Part Number: MSPM0G3507 Use function of DL_Interrupt_registerInterrupt to define all the interrupts that used.(This function will copy the vectory table into SRAM and modify the interrupt ISR entry address as needed) Example: DL_Interrupt_registerInterrupt…

  • [FAQ] MSPM0G3519: Advanced Timer Techniques in MSPM0 (application note - sdaa286)

    Part Number: MSPM0G3519 This E2E thread contains reference application codes for the Application Note titled- Advanced Timer Techniques in MSPM0. Advanced Timer (TIMA) peripherals in MSPM0 Devices are designed to meet the demands of modern embedded…

  • [FAQ] AM2634: Sending Large Amounts of Data from an AM263x SPI Slave with Minimal CS Deassertion Time

    Part Number: AM2634 Other Parts Discussed in Thread: SYSCONFIG In this FAQ, I explain an approach to transmit a large amount of data from an AM263x SPI slave device while keeping the chip select (CS) deassertion time to a minimum.

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