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Frequent questions

  • [FAQ] PROCESSOR-SDK-J721E: How to enable blending operation and two input video pipelines in DSS memory to memory path?

    Part Number: PROCESSOR-SDK-J721E DSS WB path can take input from the overlay manager output and overlay manager in the DSS can take input from two video pipelines and can blend the images and can send it out. In the current PSDKRA6.0, SDK supports only…

  • [FAQ] AM623: SPI DATA MISO/MOSI usage for D0 / D1

    Part Number: AM623 SPI data pins are named as D0 and D1. Where can i find information about the usage regarding in/output or which one is MISO / MOSI?

  • [FAQ] TDA4VL: RGMII not working on MAIN_CPSW2G in SDK 8.5 and SDK 8.6

    Part Number: TDA4VL I want to use RGMII on MAIN_CPSW2G of TDA4VL. The link is up, but I am not able to establish a communication. I can see that Rx is working but Tx is not working.

  • [FAQ] RPMsg: How to add multiple endpoints to a remote core running RTOS?

    I am using RPMsg to communicate from Linux with a remote core running RTOS (e.g., R5F or M4F). I want to define multiple RPMsg endpoints in my remote core software. How do I do that? . This FAQ applies to AM62x, AM62A, AM64x, AM65x, and probably other…

  • [FAQ] TMS320C6678: DDR3 Read write test code (or) How to do DDR3 test on C6678 EVM or K2H EVM board ?

    Part Number: TMS320C6678 Other Parts Discussed in Thread: SYSBIOS Hi Please provide "DDR3 Read write test code" (or) How to do DDR3 test on C6678 EVM or K2H EVM board ?

  • [FAQ] AM62: What is the Time Sync Router for? How do I use it?

    Part Number: AM625 AM62 has interrupt routers, just like any other processor. But it also has an interrupt router called the Time Sync Router (TSR) that is designed to route an input interrupt to multiple output interrupts. What is the TSR for? The…

  • [FAQ] TMS320C6678: How to create a EDMA PING-PONG test-code using the CSL ( Chip support Library ) package and test on C6678 EVM ?

    Part Number: TMS320C6678 Hi, How to create a EDMA PING-PONG test-code using the CSL ( Chip support Library ) package and test on C6678 EVM ?

  • [FAQ] Can the PRU implement my interface protocol?

    Part Number: AM625 I am using a TI processor with a PRU subsystem. I want to add an additional interface to my processor (e.g., UARTs, SPIs, I2S, etc), or a custom protocol (e.g., parallel SPIs, proprietary bus protocol, etc). Can I use the PRU cores…

  • [FAQ] TDA4VM: How to perform power benchmarking of model inference/run on TDA4VM SoC

    Part Number: TDA4VM Other Parts Discussed in Thread: INA226 Hi, How to do Power Benchmarking (Power consumption in Watt) for supported deep learning models (Object Detection, Classification, Segmentation) on TDA4VM SoC ? Thanks for help.

  • [FAQ] TDA4VM: Explain IPC Mailbox allocation ?

    Part Number: TDA4VM IPC uses HW mailboxes. Which ones are used, and which ones are still available ?

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