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Frequent questions

  • [FAQ] TDA4VH-Q1: How to use Cross-Domain MDIO Pins of CPSW

    Part Number: TDA4VH-Q1 Other Parts Discussed in Thread: TDA4VH The MDIO pins and the data pins routed to PHY are from different instances of CPSW due to Hawdware constrain or referencing by mistakenly, How to address this issue and possibility for using…

  • [FAQ] AM4372, AM4376, AM4377, AM4378, AM4372, AM4379, AM4382, AM4384, AM4389 Design Recommendations / Custom board hardware design - Getting started and Design Guidelines

    Part Number: AM4372 Other Parts Discussed in Thread: TPS65218 , TPS65218D0 , TPS65910 , TPS65217 , TPS650250 , TPS6521825 , TPS6521815 , TMDXEVM438X-EPOS , TMDSEVM437X , AM5728 , AM4378 Hi TI Experts, I am working on a design using AM437x or AM438x…

  • [FAQ] TDA4x: When bringing up CSI-RX, what order do I need to enable components in?

    Part Number: TDA4VH-Q1 I have a camera, serializer, and deserializer, and I'm trying to capture video on CSI-RX. What order do I need to enable the devices in? What issues may appear if the order is incorrect?

  • [FAQ] AM263P4-Q1: How to run FLS SIP examples in AM263P SIP Device?

    Part Number: AM263P4-Q1 Please provide the steps to run FLS SIP examples on AM263P SIP Device

  • [FAQ] TDA4VH-Q1: How to get Traffic profile for c7x core using cp trace

    Part Number: TDA4VH-Q1 Hi Team, Could you guide me on the steps to get the traffic profile for c7x cores using cp trace?

  • [FAQ] TDA4VH-Q1: How to Pass VLAN 0 Packets Transparently Through CPSW Using the Native Linux Driver

    Part Number: TDA4VH-Q1 By default, CPSW does not pass VID 0 (priority-tagged) frames as-is. The Linux driver strips or replaces VID 0 at both ingress and egress, making it impossible for the use-cases that require VID 0 with priority bits set on the…

  • [FAQ] AM62P: McASP on MCU-R5F Core (mcu-r5fss0-0) — AM62Px MCU+ SDK

    Part Number: AM62P Other Parts Discussed in Thread: SYSCONFIG The AM62P MCU+ SDK only provides McASP examples for the wkup-r5fss0-0 core. How do I port McASP to run on the mcu-r5fss0-0 core with DMA support on the AM62Px platform?

  • [FAQ] AM625: eMMC Boot with only R5 SPL (tiboot3.bin) on boot0 and tispl.bin/u-boot.img on UDA

    Part Number: AM625 Overview This guide documents how to configure AM62X to boot from eMMC when only tiboot3.bin fits on boot0 , and tispl.bin / u-boot.img must be loaded from a FAT32/ext4 filesystem on the UDA. This differs from the standard SDK layout…

  • [FAQ] SYSFW/TIFS Secure Crypto Service Example on AM62x

    Part Number: AM625 - SYSFW/TIFS Crypto Service The crypto services allow SYSFW/TIFS client to encrypt/decrypt data blobs using one of AES-ECB, AES-CBC or AES-GCM operations. - SYSFW/TIFS Crypto Service API https://software-dl.ti.com/tisci/esd/latest…

  • [FAQ] AM625 / AM623 / AM620-Q1 / AM62Ax / AM62D-Q1 / AM62Px / AM62L / AM64x / AM243x (ALV, ALX) Custom board hardware design – Generic Guidelines for SOM and Carrier Board Based Designs

    Part Number: AM623 Other Parts Discussed in Thread: AM62P , DP83867-EVM-AM , TMDSHSECDOCK , TDA4AL-Q1 , TDA4VL-Q1 , J721S2XSOMXEVM , TDA4VE-Q1 , J721EXCPXEVM , J721EXENETXPANEVM HI TI experts, Do you have some guidelines when designing customer board…

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