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Clock & timing

Clock & timing

Clock & timing forum

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Texas Instruments (TI) Clock & timing support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search clock & timing IC content or ask technical support questions on everything from clock synchronizers and generators to clock buffers and timers. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.

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Frequent questions
  • [FAQ] TLC555: What are the performance differences expected for TLC555 PCN 20231130002.1?

    Ron Michallick
    Ron Michallick
    Part Number: TLC555 Other Parts Discussed in Thread: , TLC3555-Q1 , TLC3555 Tool/software: PCN 20231130002.1 is the “Qualification of RFAB using qualified Process Technology, Die Revision, Datasheet update and additional Assembly Site/BOM options…
    • Answered
    • 2 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Does TI have crosses for obsolete Analog Devices HMC103x, HMC7xx, HMC8xx PLL family products and other discontinued products such as ADF5610 and HMC987 as per the Product Discontinuance Notice issued by ADI on March 22, 2022?

    Vibhu  Vanjari
    Vibhu Vanjari
    TI’s wide portfolio of RF PLLs & synthesizers features devices that are potential crosses for Analog Devices HMC103x, HMC7xx, HMC8xx PLL family products and other discontinued products such as ADF5610 and HMC987. With most of TI’s RF PLLs & synthesizers…
    • over 3 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] TPL5010: How to disable the watchdog function of TPL5010

    Dong Shen1
    Dong Shen1
    Part Number: TPL5010 Hi all, I am a FAE of TI,now my customer has a watchdog disabled problem, so I synchronously ask you for a solution: Problem Description: the customer's MCU wants to disable the watchdog function during the recording program…
    • Answered
    • over 3 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Clock Buffers: How to connect the unused pins?

    Kia Rahbar
    Kia Rahbar
    When a pin on my clock buffer is not being used, what is the correct termination?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Clock Buffers: Can my buffer handle an input while it is powered off?

    Aaron Black
    Aaron Black
    If my buffer is powered off can an input go into the device without damaging it?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] RF synthesizers: How to deal with the unused output differential pin in a RF synthesizer?

    Noel Fung
    Noel Fung
    I need single-ended output, how to deal with the unused output differential pin?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] RF synthesizers: Sample programming code for RF synthesizers

    Noel Fung
    Noel Fung
    Can TI provide sample code to program RF synthesizers?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] RF synthesizers: What is MASH order and how to determine the suitable MASH order in RF synthesizers?

    Noel Fung
    Noel Fung
    Can you tell me what is MASH order and how to determine the suitable MASH order?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] RF synthesizers: What is PFD delay and how to determine the value?

    Noel Fung
    Noel Fung
    Can you tell me what is PFD delay and how to determine the value?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] RF synthesizers: Where is the Dean's book?

    Noel Fung
    Noel Fung
    I cannot find and download Dean Banerjee's PLL Performance, Simulation, and Design book. Can you tell me where I can get a copy?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
>

View FAQ threads
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  • Not Answered

    LMK05318B: HCSL output to clock buffer 0

    48 views
    1 reply
    Latest 29 days ago
    by Jennifer Bernal
  • Answered

    LMX2594: Unused SYNC pin 0

    50 views
    1 reply
    Latest 30 days ago
    by Noel Fung
  • Suggested Answer

    LMK05318B: Question about CLKout to 1PPS input phase lock 0

    73 views
    2 replies
    Latest 1 month ago
    by Jennifer Bernal
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    LMX2595: no output and no bias voltage meanwhile VCO is locked 0

    95 views
    4 replies
    Latest 1 month ago
    by AlanCui
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    LMX2594: Using doubler to satisfy minimum multiplier frequency requirment 0

    77 views
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    Latest 1 month ago
    by Ryuji Maeda
  • Suggested Answer

    TPL5110: Verification of DRV operation at power-on 0

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    by Noel Fung
  • Suggested Answer

    SN74LVC8T245: About Input transition rise or fail rate 0

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    Latest 1 month ago
    by Joshua Salinas
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    TICSPRO-SW: Scripting improvements 0

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    Latest 1 month ago
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    LMK04828: TIDA-01023 LMK04828 distribution mode input port hardware considerations 0 Locked

    73 views
    1 reply
    Latest 1 month ago
    by vicente flores prado
  • Suggested Answer

    CDCLVP1102: Package orientation 0 Locked

    39 views
    1 reply
    Latest 1 month ago
    by vicente flores prado
  • Answered

    LMK04828: difference in functionality between SYNC pin and CLKin0 input. Resetting PLL dividers 0 Locked

    70 views
    1 reply
    Latest 1 month ago
    by vicente flores prado
  • Suggested Answer

    CDCM6208: The phase noise of the clock source is not clean at 10K. 0 Locked

    139 views
    5 replies
    Latest 1 month ago
    by Cris Kobierowski
  • Not Answered

    LMK04821: Output problem 0 Locked

    81 views
    3 replies
    Latest 1 month ago
    by Michael Srinivasan
  • Suggested Answer

    LMK1D1204: Design Review 0 Locked

    71 views
    3 replies
    Latest 1 month ago
    by Michael Srinivasan
  • Suggested Answer

    LMK6C: Does TI have a LMK6C clock generator can output a 1.024MHz clock? 0 Locked

    90 views
    1 reply
    Latest 1 month ago
    by Connor Lewis
  • Answered

    LMK04610: LMK04610 rapid phase shifts on PLL1 0 Locked

    195 views
    7 replies
    Latest 1 month ago
    by John C
  • Suggested Answer

    LMX2595: Terminal Plating 0 Locked

    64 views
    3 replies
    Latest 1 month ago
    by Noel Fung
  • Answered

    LMX2595: Au Plating Thickness 0 Locked

    76 views
    4 replies
    Latest 1 month ago
    by Andrew Thiel
  • Not Answered

    LMX2572: Phase drift of a locked PLL 0 Locked

    115 views
    1 reply
    Latest 1 month ago
    by Noel Fung
  • Suggested Answer

    CDCDB400: What is the input common mode voltage for CLKIN_P and CLKIN_N 0 Locked

    64 views
    1 reply
    Latest 1 month ago
    by vicente flores prado
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