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Clock & timing

Clock & timing

Clock & timing forum

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Texas Instruments (TI) Clock & timing support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search clock & timing IC content or ask technical support questions on everything from clock synchronizers and generators to clock buffers and timers. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.

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Frequent questions
  • [FAQ] LMK5B33216: Determining impact of supply voltage noise and PSNR specification on output phase noise

    Timothy T
    Timothy T
    Part Number: LMK5B33216 This covers the math to simulate clock output phase noise noise as a result of voltage supply noise using PSNR and then creating a voltage supply noise mask based on your requirements. How to use PSNR data and input voltage…
    • 4 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] The What and How of TI DPLLs (What is a DPLL? How does a DPLL work?)

    Jennifer Bernal
    Jennifer Bernal
    Part Number: LMK5B33216 [DPLL Training Slides] The What-How of TI DPLLs_share, e2e.pdf
    • 4 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] PLLATINUMSIM-SW: PLL Training Material

    Dean Banerjee
    Dean Banerjee
    Part Number: PLLATINUMSIM-SW Attached is a detailed training on PLL Theory PLL Fundamentals Full Training (Public).pdf
    • 4 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] LMK5B33216: How to choose the loop bandwidth for your PLL

    Timothy T
    Timothy T
    Part Number: LMK5B33216 Here's some information on choosing a loop bandwidth for your PLL to optimize noise performance. The presentation starts with some general theory on noise and PLLs, discusses how to pick loop bandwidth for a "PLL/VCO optimized…
    • 4 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] TLC555: What are the performance differences expected for TLC555 PCN 20231130002.1?

    Ron Michallick
    Ron Michallick
    Part Number: TLC555 Other Parts Discussed in Thread: , TLC3555-Q1 , TLC3555 Tool/software: PCN 20231130002.1 is the “Qualification of RFAB using qualified Process Technology, Die Revision, Datasheet update and additional Assembly Site/BOM options…
    • Answered
    • 8 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Does TI have crosses for obsolete Analog Devices HMC103x, HMC7xx, HMC8xx PLL family products and other discontinued products such as ADF5610 and HMC987 as per the Product Discontinuance Notice issued by ADI on March 22, 2022?

    Vibhu  Vanjari
    Vibhu Vanjari
    TI’s wide portfolio of RF PLLs & synthesizers features devices that are potential crosses for Analog Devices HMC103x, HMC7xx, HMC8xx PLL family products and other discontinued products such as ADF5610 and HMC987. With most of TI’s RF PLLs & synthesizers…
    • over 3 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] TPL5010: How to disable the watchdog function of TPL5010

    Dong Shen1
    Dong Shen1
    Part Number: TPL5010 Hi all, I am a FAE of TI,now my customer has a watchdog disabled problem, so I synchronously ask you for a solution: Problem Description: the customer's MCU wants to disable the watchdog function during the recording program…
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Clock Buffers: How to connect the unused pins?

    Kia Rahbar
    Kia Rahbar
    When a pin on my clock buffer is not being used, what is the correct termination?
    • Answered
    • over 5 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Clock Buffers: Can my buffer handle an input while it is powered off?

    Aaron Black
    Aaron Black
    If my buffer is powered off can an input go into the device without damaging it?
    • Answered
    • over 5 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] RF synthesizers: How to deal with the unused output differential pin in a RF synthesizer?

    Noel Fung
    Noel Fung
    I need single-ended output, how to deal with the unused output differential pin?
    • Answered
    • over 5 years ago
    • Clock & timing
    • Clock & timing forum
>

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  • Not Answered

    Replace Renesas & SiTime Data Center PCIe Clocking Solutions with TI Buffers & Oscillators. 0

    236 views
    0 replies
    Started 21 days ago
    by CP Ong
  • Not Answered

    [FAQ] The What and How of TI DPLLs (What is a DPLL? How does a DPLL work?) 0

    776 views
    1 reply
    Latest 4 months ago
    by Timothy T
  • Suggested Answer

    LMK00334: Impact of Output Clock mapping to devices with different logic levels 0

    42 views
    2 replies
    Latest 3 hours ago
    by Yasar Maheen Seenath
  • Suggested Answer

    MSPM0G5187: MSPM0G5117 – Clock Configuration Changes Without Using SysConfig 0

    42 views
    5 replies
    Latest 5 hours ago
    by Sal Ye
  • Not Answered

    LMK5B12204: TICS Pro "Run Script" overrides 1PPS optimization values from release notes 0

    9 views
    0 replies
    Started 5 hours ago
    by Kazunori Kasajima
  • Answered

    LMX2492EVM: LMX2492EVM ramp generation issue 0

    218 views
    9 replies
    Latest 6 hours ago
    by Thomas ASNI
  • Suggested Answer

    LMX2595EVM: LMX2595EVM - Manual Ramping 0

    33 views
    2 replies
    Latest 7 hours ago
    by Akshay Sugandhi
  • Suggested Answer

    LSF0101: IBIS model issue LSF0101 0

    116 views
    9 replies
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    by Vidhya J
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    LMK1C1103A: LMK1C1103A Clock Buffer Usage Check for DSP-Based Base Station Design 0

    20 views
    1 reply
    Latest 10 hours ago
    by Michael Srinivasan
  • Suggested Answer

    LMK1C1102: Level shifting ability of LMK1C1102 0

    37 views
    2 replies
    Latest 10 hours ago
    by Michael Srinivasan
  • Suggested Answer

    LMK1D1208: Die on LMK1208 Eval Board 0

    17 views
    1 reply
    Latest 10 hours ago
    by Michael Srinivasan
  • Suggested Answer

    LMX2820: LMX2820 lock time 0

    21 views
    1 reply
    Latest 20 hours ago
    by Noel Fung
  • Suggested Answer

    LMX2820: The immediate fast lock of the LMX2820 is sometimes successful and sometimes fails 0

    17 views
    1 reply
    Latest 20 hours ago
    by Noel Fung
  • Suggested Answer

    LMX2820: About LMX2820 Instant Calibration 0

    42 views
    1 reply
    Latest 20 hours ago
    by Noel Fung
  • Suggested Answer

    LMK04616: Need help configuring LMK04616 0

    134 views
    4 replies
    Latest 23 hours ago
    by Andrey Luzhanskij
  • Not Answered

    AM625: Inconsistent timer readings when calculating frequency of a PWM input signal 0

    115 views
    8 replies
    Latest 23 hours ago
    by Harshith Puram
  • Not Answered

    LMX2594: the weird spur of lmx2594 output 0

    110 views
    5 replies
    Latest 1 day ago
    by user5959213
  • Answered

    LMK5B12204: PLL Lock 0

    1557 views
    54 replies
    Latest 1 day ago
    by YOSHINORI KODAMA
  • Suggested Answer

    LMK6BEVM-DOC-CERT: Clock Design Tool and PLLatinum sim have different jitter results 0

    53 views
    3 replies
    Latest 1 day ago
    by Michael Srinivasan
  • Suggested Answer

    LMK04832: datasheet confusing 0

    20 views
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>