TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Interface

Interface

Interface forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] How to Enable DSxxxDFxxx to Lock to Any Data Rate within VCO Range

    Nasser Mohammadi
    Nasser Mohammadi
    Part Number: DS280DF810 Other Parts Discussed in Thread: SIGCONARCHITECT In this example, we use a non-standard data rate - for example 24.33Gbps - and configure register settings to lock to this data rate. Note: Data rate MUST be within the device…
    • Answered
    • over 7 years ago
    • Interface
    • Interface forum
  • [FAQ] DS280DF810: What are register settings to enable prbs generator and checker using a simple divide by 2, 4, or 8 clock

    Nasser Mohammadi
    Nasser Mohammadi
    Part Number: DS280DF810 Using DS280DFxxx or DS250DFxxx we can use a simple divide by 2, 4, or 8 of the data rate clock to generate different prbs pattern at different data rates up to 28Gbps. What are the register settings to make this happen?
    • Answered
    • over 7 years ago
    • Interface
    • Interface forum
  • [FAQ] DS250DF410: How to setup PRBS pattern generation/checker using divide by 2, 4, or 8 clock

    Nasser Mohammadi
    Nasser Mohammadi
    Part Number: DS250DF410 Other Parts Discussed in Thread: SIGCONARCHITECT Using a simple clock, DS250DFxxx and DS280DFxxx can generate different prbs patterns at different data rate up to 28Gbps. To make it very simple, SigconArchitect can be used to achieve…
    • Answered
    • over 7 years ago
    • Interface
    • Interface forum
  • [FAQ] PCA9306: Voltage levels translation

    Simon Arthur
    Simon Arthur
    Part Number: PCA9306 To allow proper translation of I2C signals from one voltage reference to another, both the high-level and low-level voltage thresholds need to be translated. However, these threshold voltages are not mentioned in the datasheet of…
    • Answered
    • over 8 years ago
    • Interface
    • Interface forum
<

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Answered

    DP83867E, Link two PHY's without an MAC for an Converter? 1000Base-T, Ethernet 0 Locked

    1977 views
    2 replies
    Latest over 8 years ago
    by Matthias Hagn
  • Not Answered

    TUSB8041 unstable connection 0 Locked

    498 views
    1 reply
    Latest over 9 years ago
    by Elias Villegas M.
  • Answered

    TLK10034: 10GBASE-KR auto-negotiation based on the Low Speed interface link speed 0 Locked

    2653 views
    10 replies
    Latest over 9 years ago
    by Luis Omar Moran
  • Not Answered

    DS100BR210 users manual typo? 0 Locked

    682 views
    2 replies
    Latest over 9 years ago
    by Michael Lu (Santa Clara)
  • Suggested Answer

    Need android Driver for DP83867 0 Locked

    463 views
    1 reply
    Latest over 9 years ago
    by Ross Pimentel
  • Not Answered

    USB 3.0 - TUSB7320IRKM 0 Locked

    789 views
    1 reply
    Latest over 9 years ago
    by Elias Villegas M.
  • Not Answered

    SN75LVPE802 Two-Channel 8 Gbps SATA Express Equalizer and Redriver --- 0 Locked

    847 views
    1 reply
    Latest over 9 years ago
    by Moises Garcia
  • Answered

    TCAN1042HV issue 0 Locked

    735 views
    1 reply
    Latest over 9 years ago
    by Miguel Robertson
  • Suggested Answer

    About test data of SN65LVDS250 0 Locked

    912 views
    5 replies
    Latest over 9 years ago
    by Satoshi
  • Answered

    TPS65982 Hreset I/O level 0 Locked

    544 views
    2 replies
    Latest over 9 years ago
    by kerr chang
  • Not Answered

    Orcad Schematics for XIO2001 and XIO3130 EVM 0 Locked

    786 views
    2 replies
    Latest over 9 years ago
    by Lee Foss
  • Not Answered

    TPS65983 for APEX CREEK WITH ATX 0 Locked

    1214 views
    3 replies
    Latest over 9 years ago
    by Kai Hsiao
  • Not Answered

    DS90UB914 VSYNC,HSYNC,DATA and PCLK no output 0 Locked

    481 views
    0 replies
    Started over 9 years ago
    by Mickey Zhang
  • Answered

    TPS65982 : Use the same voltage for PP_EXT and PP_HV 0 Locked

    910 views
    3 replies
    Latest over 9 years ago
    by Younès Gahnem
  • Not Answered

    TPS65982EVM S1 DIP switch 0 Locked

    788 views
    2 replies
    Latest over 9 years ago
    by Nic Lin
  • Answered

    TUSB8020 SMBus register configuration details 0 Locked

    839 views
    2 replies
    Latest over 9 years ago
    by Edmund Pirali99
  • Not Answered

    Trouble with SN65LVDS310 0 Locked

    4766 views
    24 replies
    Latest over 9 years ago
    by Elias Villegas M.
  • Not Answered

    DS90UB954-Q1 EVM board design 0 Locked

    274 views
    0 replies
    Started over 9 years ago
    by GRACE HU
  • Suggested Answer

    [ LMH1982 ] No lock indication of SD_LOCK 0 Locked

    869 views
    3 replies
    Latest over 9 years ago
    by Alan O
  • Answered

    TUSB8020B Configuration 0 Locked

    838 views
    3 replies
    Latest over 9 years ago
    by Elias Villegas M.
<>