TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Interface

Interface

Interface forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] How can I ensure a successful PCIe Gen5 design?

    Nicholaus_Malone
    Nicholaus_Malone
    3 Tips for a successful PCIe Gen5 design With PCIe datarates increasing to 32Gbps in the latest PCIe Gen5 specification, PCIe has allowed for data higher throughput than ever before. Unfortunately, higher data rates can also mean more signal integrity…
    • Answered
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867CR: How to generate free-running 125MHz clock from DP83867?

    Vikram Sharma
    Vikram Sharma
    Part Number: DP83867CR To generate free running clock of 125MHz on the CLKOUT pin of DP83867 (synced with local reference clock on XI pin) : program register 0x0170[12:8] = 01000
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867CR: How to generate recovered clock using DP83867?

    Vikram Sharma
    Vikram Sharma
    Part Number: DP83867CR To generate clock in sync with the link-partner (recovered clock of 125MHz or 25MHz) on the CLKOUT pin of DP83867 : program register 0x0170[12:8] = 00000 for 125MHz program register 0x0170[12:8] = 00100 for 25MHz Note…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] ESD and TVS Protection Devices: All Technical Documentation

    Chris Murphy
    Chris Murphy
    Application Notes Protecting Automotive Can Bus Systems from ESD Overvoltage Events ESD and Surge Protection for USB Interfaces Automotive SerDes ESD Protection MSP430 System-Level ESD Considerations (Rev. B)…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TD510E: Can we use a transformer instead of Capacitor for AC coupling on the MDI side for DP83TD510?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TD510E Yes, transformer can be used for filtering out the DC signal when the data is passing through the MDI side. In fact, we use transformer to filter out the AC signal in the Power over Data Line (PoDL) application. Here are the…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] What is the difference between RMII slave signaling and RMII master signaling?

    Hillman Lin
    Hillman Lin
    RMII slave signaling is connecting 50MHz Crystal to two XI pin of the PHY and/or MAC RMII master signaling is connection 25MHz Crystal to one Master and provide a 50MHz reference lock through REF_CLK pin to the XI pin of the slave side. Slave side does…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC812R-Q1: How can I connect PHYs back to back over RMII?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TC812R-Q1 There are two type of mode that RMII can support: RMII normal mode and RMII Repeater mode: RMII normal mode is also known as MAC to PHY RMII connection. This mode is set as default mode in DP83TC812 so it did not need…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC811S-Q1: Why is Slave/Managed mode PHY linking up with Master/Autonomous PHY link partner?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83TC811S-Q1 Other Parts Discussed in Thread: DP83TC811R-Q1 When using DP83TC811S-Q1 (or DP83TC811R-Q1), and setting the PHY into managed mode as a slave device via bootstrapping settings, if this device is connected to a master link partner…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UH949-Q1: Disable HDCP to work with UB Deserializer

    Alex Reid1
    Alex Reid1
    Part Number: DS90UH949-Q1 Hello, My customer would like to use DS90 UH949 -Q1 devices in place of the DS90 UB949A -Q1 to keep production running. In reviewing the details they have the following questions. Can the HDCP function be disabled? If…
    • Answered
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] Why am I getting "clause-45 not supported" and "error-95" errors with PHY drivers?

    Vikram Sharma
    Vikram Sharma
    Possible reason can be : - "phy_read_mmd" and "phy_write_mmd" are not supported in your kernel version (if version is old). Possible solution to be evaluated : - Change "phy_write_mmd" to "phy_write_mmd_indirect" function and do the corresponding…
    • over 4 years ago
    • Interface
    • Interface forum
<>

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Answered

    TCAN3413: IBS model fails parser check, Part TCAN3413DR 0 Locked

    338 views
    8 replies
    Latest 7 months ago
    by Joseph Dvorsky
  • Suggested Answer

    TCAN4550: TCAN4550 AP under WIN10 or WIN11 0 Locked

    169 views
    1 reply
    Latest 7 months ago
    by Jonathan Nerger
  • Suggested Answer

    DS90CF364: Questions about LVDS_VCC pin of DS90CF364. 0 Locked

    109 views
    1 reply
    Latest 7 months ago
    by Hamzeh Jaradat
  • Suggested Answer

    TCAN1043G-Q1: ICC current range 0 Locked

    92 views
    1 reply
    Latest 7 months ago
    by Michael Ikwuyum
  • Not Answered

    TLK10232: TX_FIFO_UNDERFLOW and RX_FIFO_UNDERFLOW 0 Locked

    194 views
    5 replies
    Latest 7 months ago
    by Yossi Aharon1
  • Suggested Answer

    DS160PT801: Can't link device 0 Locked

    2628 views
    37 replies
    Latest 7 months ago
    by Jeff YANG
  • Not Answered

    SN65DP159: data regarding the prudact 0 Locked

    99 views
    0 replies
    Started 7 months ago
    by Shahar Yaffe
  • Not Answered

    AM2754-Q1: Do you have any application materials related to SPDIF? 0 Locked

    86 views
    0 replies
    Started 7 months ago
    by user6481287
  • Not Answered

    DP83TG721S-Q1: DP83TG721S-Q1 - Schematic Review 0 Locked

    205 views
    1 reply
    Latest 7 months ago
    by David Creger
  • Suggested Answer

    DS90UB948-Q1: Is it possible to use only the RIN1 channel of the DS90UH948-Q1 while leaving the RIN0 channel unused? 0 Locked

    280 views
    1 reply
    Latest 7 months ago
    by Jack Scherlag
  • Suggested Answer

    ESD441: ESD441 DPL package doesn't match the footprint 0 Locked

    148 views
    1 reply
    Latest 7 months ago
    by McKenzie Eaker
  • Suggested Answer

    TXS0104W: Availability Request for TXS0104W (BQA, WQFN-12) Package 0 Locked

    100 views
    1 reply
    Latest 7 months ago
    by Jack Guan
  • Suggested Answer

    TXB0108-Q1: Confirming 1.2V use case 0 Locked

    166 views
    1 reply
    Latest 7 months ago
    by Jack Guan
  • Not Answered

    DS110DF1610: Does CDR reset temporarily block incoming signals 0 Locked

    108 views
    0 replies
    Started 7 months ago
    by Kyle MacNeil
  • Suggested Answer

    DS160PR410: IBIS model 0 Locked

    270 views
    5 replies
    Latest 7 months ago
    by Changyi Su
  • Suggested Answer

    DP83869HM: DP83869HM: Review schematic designed for SGMII mode (1000 Mbps) 0 Locked

    519 views
    3 replies
    Latest 7 months ago
    by Shane Hauser
  • Suggested Answer

    DS250DF230EVM: Software access request 0 Locked

    220 views
    5 replies
    Latest 7 months ago
    by Gregory Kobyakov
  • Answered

    TVS5800: Footprint information / mechanical drawing for TVS5800 0 Locked

    198 views
    2 replies
    Latest 7 months ago
    by Samuel Westenberg
  • Not Answered

    DP83822I: DP83822I EtherCAT Communication Issue and Schematic Review 0 Locked

    159 views
    1 reply
    Latest 7 months ago
    by Shane Hauser
  • Not Answered

    TUSB1210: TUSB1210 vs USB3340 comparison 0 Locked

    124 views
    1 reply
    Latest 7 months ago
    by Brian Zhou
<>