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Interface

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Interface forum

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Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] DP83822I: How to use RMII repeater mode in DP83822?

    Hillman Lin
    Hillman Lin
    Part Number: DP83822I Could someone guide me on how to use DP83822 for RMII repeater mode?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83822I: Link up debug with DP83822

    Hillman Lin
    Hillman Lin
    Part Number: DP83822I
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83822I: 822/826 Odd Nibble Detection disable for EtherCAT application

    Hillman Lin
    Hillman Lin
    Part Number: DP83822I For 822/826 PHYs, Odd Nibbles Detection register need to be disable in order to prevent unexpected link loss in EtherCAT application. DP83826PHY: Odd Nibble Detection could be disable by strap 1 CLKOUT/LED1 pin in enhanced…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] Can Auto-negotiation link up with Force mode on 100mbps?

    Hillman Lin
    Hillman Lin
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83822IF: Fiber Link Status

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Part Number: DP83822IF Other Parts Discussed in Thread: DP83822HF , The DP83822IF and DP83822HF are the fiber capable variants of the DP83822. Bit 2 in Register 0x0001 indicates link status for both Copper and Fiber modes of operation. In copper mode…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] Extended Register Space Access for Ethernet PHYs

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Our Ethernet PHYs have a standard set of registers, 0x0-0x1F, that can be accessed in a straight forward fashion. Registers beyond 0x1F require a different approach to access. This FAQ is intended to provide a few examples on how to read/write these…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] SN65DSI86: SN65DSI86 Resolution Guide

    Allison Noe
    Allison Noe
    Part Number: SN65DSI86 What display resolution will the SN65DSI86 support?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: What is the default mode of RGMII when using DP83867, shift or align?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83867E When bootstrapped to be in RGMII mode, DP83867 will be in shift mode by default; not align mode. The modes will be corroborated via Reg 0x32[1:0].
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83869HM: How to generate 125MHz on CLKOUT pin for DP83869

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83869HM DP83869HM needs an additional register to be written to enable CLKOUT modification. By default, this signal is a buffered version of the XI signal. Reg 0xC6 must have 0x10 written in order for the value in Reg 0x170[12:8] to take…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] TI Ethernet PHY Capacitive Coupling (Transformerless Operation)

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Other Parts Discussed in Thread: DP83869 Summary: All of our Industrial Ethernet PHYs support Transformer-less Operation via Capacitive Coupling except for the DP83867. The DP83867 does not support Transformer-less Operation. List of Industrial…
    • over 2 years ago
    • Interface
    • Interface forum
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  • Answered

    TPS65987D: i2c communication 0 Locked

    349 views
    1 reply
    Latest over 5 years ago
    by Prajith Cheerakkoda
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    TPS65987D: wider temperature range? 0 Locked

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    PCA9539: How I can evaluate the PCA9539 before implementing into my design? 0 Locked

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    DS90UB948-Q1: whether CMLOUT 's Eye diagram meet the requirement 0 Locked

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    DS90UB948-Q1: Whether 948 could control the GPIO0-3 output 0/1 directly? 0 Locked

    226 views
    1 reply
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    by Casey McCrea
  • Suggested Answer

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    199 views
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    Latest over 5 years ago
    by Casey McCrea
  • Suggested Answer

    HD3SS3411: Do we have PCIE 4.0 MUX available or in the roadmap? Do we have the PCIE 4.0 MUX with redriver available or in the roadmap? 0 Locked

    405 views
    1 reply
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    by Brian Zhou
  • Answered

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    213 views
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    by Frank Van Hooft1
  • Not Answered

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  • Answered

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    by Justin Lazaruk
  • Answered

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  • Not Answered

    UA9638: Output Waveform 0 Locked

    477 views
    1 reply
    Latest over 5 years ago
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  • Suggested Answer

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    314 views
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    Latest over 5 years ago
    by Vikram Sharma
  • Answered

    SN65DSI86: FPGA + MC20902 solution issue 0 Locked

    2505 views
    16 replies
    Latest over 5 years ago
    by Alex M2
  • Not Answered

    DS90UB936-Q1: DS90UB936-Q1 0 Locked

    478 views
    3 replies
    Latest over 5 years ago
    by Hamzeh Jaradat
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