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Frequent questions

  • [FAQ] DP83867IR: How to test the link-quality using DP83867's BIST and status registers?

    Part Number: DP83867IR DP83867 PHY (and other TI industrial and automotive PHYs) have the capability to : 1. Generate the packetized data 2. Capture the number of frames received 3. Capture the number of frames received with errors. These parameters…

  • [FAQ] DP83TD510E: How to check throughput without depending upon MAC?

    Part Number: DP83TD510E DP83TD510E PHY (and other TI industrial and automotive PHYs) have the capability to : 1. Generate the packetized data 2. Capture the number of frames received 3. Capture the number of frames received with errors. These…

  • [FAQ] DP83867E: How do I choose magnetics for my industrial PHY?

    Part Number: DP83867E There are 5 key parameters to look out for when selecting magnetics: Magnetic type (specifically for integrated RJ-45/Magnetic component) Can the recommended MDI configuration still be met with this component? Turns…

  • [FAQ] TLK2711-SP: Eye Mask Recommendations

    Part Number: TLK2711-SP There have been some questions regarding the TLK2711-SP eye mask related to the following E2E thread, so I am hoping to clarify them in this post. TLK2711-SP: Is there an EYE diagram mask definition available? - Space & High…

  • [FAQ] DS90UH941AS-Q1: How to configure FPD-Link III 94x audio

    Part Number: DS90UH941AS-Q1 How do I configure audio for FPD-Link III 94x devices?

  • [FAQ] DP83826E: In enhanced mode, how does DP83826 strapping work?

    Part Number: DP83826E When configuring DP83826 in Enhanced Mode, please consult the following flowchart to understand how the different strap pins configure the PHY into various modes.

  • [FAQ] DP83TG720S-Q1: How to read or write registers in extended register space of Ethernet PHY?

    Part Number: DP83TG720S-Q1 write procedure for MMD "1F" registers: write reg<000D> = 0x001F write reg<000E> = <address> write reg<000D> = 0x401F write reg<000E> = <value> read procedure for MMD "1F" registers: write reg<000D> = 0x001F …

  • [FAQ] How can I ensure a successful PCIe Gen5 design?

    3 Tips for a successful PCIe Gen5 design With PCIe datarates increasing to 32Gbps in the latest PCIe Gen5 specification, PCIe has allowed for data higher throughput than ever before. Unfortunately, higher data rates can also mean more signal integrity…

  • [FAQ] DP83867CR: How to generate free-running 125MHz clock from DP83867?

    Part Number: DP83867CR To generate free running clock of 125MHz on the CLKOUT pin of DP83867 (synced with local reference clock on XI pin) : program register 0x0170[12:8] = 01000

  • [FAQ] DP83867CR: How to generate recovered clock using DP83867?

    Part Number: DP83867CR To generate clock in sync with the link-partner (recovered clock of 125MHz or 25MHz) on the CLKOUT pin of DP83867 : program register 0x0170[12:8] = 00000 for 125MHz program register 0x0170[12:8] = 00100 for 25MHz Note…

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