TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Interface

Interface

Interface forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] How can I ensure a successful PCIe Gen5 design?

    Nicholaus_Malone
    Nicholaus_Malone
    3 Tips for a successful PCIe Gen5 design With PCIe datarates increasing to 32Gbps in the latest PCIe Gen5 specification, PCIe has allowed for data higher throughput than ever before. Unfortunately, higher data rates can also mean more signal integrity…
    • Answered
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867CR: How to generate free-running 125MHz clock from DP83867?

    Vikram Sharma
    Vikram Sharma
    Part Number: DP83867CR To generate free running clock of 125MHz on the CLKOUT pin of DP83867 (synced with local reference clock on XI pin) : program register 0x0170[12:8] = 01000
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867CR: How to generate recovered clock using DP83867?

    Vikram Sharma
    Vikram Sharma
    Part Number: DP83867CR To generate clock in sync with the link-partner (recovered clock of 125MHz or 25MHz) on the CLKOUT pin of DP83867 : program register 0x0170[12:8] = 00000 for 125MHz program register 0x0170[12:8] = 00100 for 25MHz Note…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] ESD and TVS Protection Devices: All Technical Documentation

    Chris Murphy
    Chris Murphy
    Application Notes Protecting Automotive Can Bus Systems from ESD Overvoltage Events ESD and Surge Protection for USB Interfaces Automotive SerDes ESD Protection MSP430 System-Level ESD Considerations (Rev. B)…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TD510E: Can we use a transformer instead of Capacitor for AC coupling on the MDI side for DP83TD510?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TD510E Yes, transformer can be used for filtering out the DC signal when the data is passing through the MDI side. In fact, we use transformer to filter out the AC signal in the Power over Data Line (PoDL) application. Here are the…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] What is the difference between RMII slave signaling and RMII master signaling?

    Hillman Lin
    Hillman Lin
    RMII slave signaling is connecting 50MHz Crystal to two XI pin of the PHY and/or MAC RMII master signaling is connection 25MHz Crystal to one Master and provide a 50MHz reference lock through REF_CLK pin to the XI pin of the slave side. Slave side does…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC812R-Q1: How can I connect PHYs back to back over RMII?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TC812R-Q1 There are two type of mode that RMII can support: RMII normal mode and RMII Repeater mode: RMII normal mode is also known as MAC to PHY RMII connection. This mode is set as default mode in DP83TC812 so it did not need…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC811S-Q1: Why is Slave/Managed mode PHY linking up with Master/Autonomous PHY link partner?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83TC811S-Q1 Other Parts Discussed in Thread: DP83TC811R-Q1 When using DP83TC811S-Q1 (or DP83TC811R-Q1), and setting the PHY into managed mode as a slave device via bootstrapping settings, if this device is connected to a master link partner…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UH949-Q1: Disable HDCP to work with UB Deserializer

    Alex Reid1
    Alex Reid1
    Part Number: DS90UH949-Q1 Hello, My customer would like to use DS90 UH949 -Q1 devices in place of the DS90 UB949A -Q1 to keep production running. In reviewing the details they have the following questions. Can the HDCP function be disabled? If…
    • Answered
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] Why am I getting "clause-45 not supported" and "error-95" errors with PHY drivers?

    Vikram Sharma
    Vikram Sharma
    Possible reason can be : - "phy_read_mmd" and "phy_write_mmd" are not supported in your kernel version (if version is old). Possible solution to be evaluated : - Change "phy_write_mmd" to "phy_write_mmd_indirect" function and do the corresponding…
    • over 4 years ago
    • Interface
    • Interface forum
<>

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Not Answered

    SN65DSI84-Q1: TS3DV642RUATQ1 skew impact when removing one of two matched switches on SN65DSI84 dual-link LVDS output 0 Locked

    167 views
    5 replies
    Latest 2 months ago
    by Ikram Haque
  • Answered

    TLK10232: Interface of microcontroller for 1GBase-KX 0 Locked

    113 views
    2 replies
    Latest 2 months ago
    by Drew Miller1
  • Suggested Answer

    DP83869HM: DP83869HM: DP83869 SGMII Receive Pair Polarity Inversion 0 Locked

    163 views
    1 reply
    Latest 2 months ago
    by Shane Hauser
  • Suggested Answer

    TUSB1002A: TUSB1002A Redriver addition into the De-embedding section 0 Locked

    70 views
    2 replies
    Latest 2 months ago
    by Vishesh Pithadiya
  • Suggested Answer

    THS8135: Tri-level generator 0 Locked

    172 views
    1 reply
    Latest 2 months ago
    by Adrian Guzman
  • Not Answered

    DP83848J: Pin cnfiguration of DP83848J and DP83848C 0 Locked

    51 views
    1 reply
    Latest 2 months ago
    by Gerome Cacho
  • Suggested Answer

    TXB0604: TXB0604 Alternative for 1.8-V eSPI With Only ±2-mA Source Drive Strength 0 Locked

    182 views
    7 replies
    Latest 2 months ago
    by Jack Guan
  • Not Answered

    TUSB7320: TUSB7320: Device Swap Test Results 0 Locked

    121 views
    3 replies
    Latest 2 months ago
    by Brian Zhou
  • Answered

    TCA9555: question about Input filter on SCL and SDA 0 Locked

    98 views
    1 reply
    Latest 2 months ago
    by Tyler Townsend
  • Answered

    TCAN3414: WUP issue on TCAN3414DR 0 Locked

    158 views
    5 replies
    Latest 2 months ago
    by Michael Ikwuyum
  • Answered

    AM2432: Ethernet IP stack problem with 2. interface 0 Locked

    234 views
    9 replies
    Latest 2 months ago
    by Michael Schwartau
  • Answered

    TLIN1021A-Q1: Vias in Layout Example 0 Locked

    120 views
    2 replies
    Latest 2 months ago
    by Youhei Miyaoka
  • Not Answered

    DS250DF230: DS250DF230 SIGCONE GUI 0 Locked

    72 views
    2 replies
    Latest 2 months ago
    by LIOR GRINBERG
  • Suggested Answer

    DS320PR810RSCEVM: EEPROM not writing 0 Locked

    217 views
    12 replies
    Latest 2 months ago
    by vamsi kothapalli
  • Answered

    DS320PR410: sample code for ubuntu 0 Locked

    95 views
    2 replies
    Latest 2 months ago
    by Jeff YANG
  • Suggested Answer

    TCA39306: Which Side Should Be Powered First, VREF1 or VREF2? 0 Locked

    134 views
    3 replies
    Latest 2 months ago
    by Tyler Townsend
  • Suggested Answer

    TCAL6416: TCAL6416 Floating P Ports 0 Locked

    59 views
    1 reply
    Latest 2 months ago
    by Tyler Townsend
  • Suggested Answer

    TCA6424A: Timing requirements for RESET release during TCA6424A power-up 0 Locked

    157 views
    2 replies
    Latest 2 months ago
    by Tyler Townsend
  • Answered

    LMH1218: Writing to registers unpublished on the data sheet. 0 Locked

    143 views
    6 replies
    Latest 2 months ago
    by Dave Pelletier
  • Suggested Answer

    TUSB1002A: signal‑compensation capabilities 0 Locked

    97 views
    1 reply
    Latest 2 months ago
    by Vishesh Pithadiya
<>