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Frequent questions

  • [FAQ] How do I bring/brought up Ethernet interfaces for Main Domain CPSWnG in Linux from SDK Version 9.0 and above?

    Other Parts Discussed in Thread: DRA821 , DRA829 , TDA4VM , TDA4VH , TDA4VL How do I bring/brought up Ethernet interfaces for Main Domain CPSWnG in Linux from SDK Version 9.0 and above?

  • [FAQ] Setting up Auto Exposure (AE) for your image sensor with TDA4/AM6xA ISP (VPAC)

    How can I set up AE for an camera/sensor with TDA4/AM6xA ISP (VPAC)?

  • [FAQ] Where can i find MCAL configurator package and EB Tresos studio for Jacinto devices ?

    Part Number: TDA4VM Hello, Customers typically asks below 2 queries on MCUSW Configurator 1. How to get access for MCAL Configurator package "MCUSW_XX_YY_ZZ_BB_CONFIG-windows-installer.exe" ? 2. How to request an EB Tresos license for MCUSW…

  • [FAQ] AM6412: AM64x SPI D0 and D1 - MISO/MOSI

    Part Number: AM6412 Hi, As per the AM64x Sitara Processors datasheet, both MCSPI and MCU_MCSPI D0 and D1 signals defined as IO pin type We need to develop a product based on the AM6412 processor While interfacing any slaves devices with the AM6412…

  • [FAQ] J721S2XSOMXEVM: How to enable main domain watchdog?

    Part Number: J721S2XSOMXEVM Other Parts Discussed in Thread: TDA4VM The j721e/TDA4VM has SOC watchdog enabled. How to enable the same on J721s2?

  • [FAQ] DCC Tuning Tool V3.2 for VPAC on TDA4x and AM6xA Devices

    Hi everyone, DCC Tuning Tool V3.2 for TDA4x and AM6xA has been released in 09/2024. You may find it now in your secure resource section on ti.com. If you have no access or expired access, you may apply here -- http://www.ti.com/drr/opn/ADAS-SW-IMAGING…

  • [FAQ] J784S4XEVM: How to enable main domain watchdog?

    Part Number: J784S4XEVM Other Parts Discussed in Thread: TDA4VM The j721e/TDA4VM has SOC watchdog enabled. How to enable the same on J784s4?

  • [FAQ] AM64X/AM62X: How do I route the same GPIO bank interrupts to different destination cores?

    Part Number: AM6442 How do I route the same GPIO bank interrupts to different destination cores? Example: I want to route the GPIO0_37 pin interrupt to R5F0_0 and the GPIO0_38 pin interrupt to R5F0_1. when I was selecting the above pin combination…

  • [FAQ] AM625: Long Term Effects of Simultaneously Power-Down Sequencing of all Voltage Rails

    Part Number: AM625 I'm working with a customer that is using the TPS6521908 as their PMIC, and therefore, should in nearly all cases have a controlled power-down sequencing of all the AM62x voltage rails. However, it is still possible that they could…

  • [FAQ]: Transitioning the GPIO userspace interface from SYSFS to Chardev

    This information applies to Linux SDK Version 9.0 and prior. For more up to date information, refer to this FAQ: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1494485/faq-processor-sdk-getting-started-with-gpios-in-linux-using…

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