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Frequent questions

  • [FAQ] DRA821U-Q1: How to enable RGMII2 on CPSW5G for TI EVM using the Native Linux Driver?

    Part Number: DRA821U-Q1 Tool/software: How can I enable the RGMII2 interface from the CPSW5G Ethernet switch on the DRA821-Q1 TI EVM using the native Linux driver?

  • [FAQ] TDA4AEN-Q1: How to enable SGMII support on CPSW3G using native Linux Driver?

    Part Number: TDA4AEN-Q1 Tool/software: What is the procedure to enable or activate SGMII interface support for CPSW3G in the native Linux Driver?

  • [FAQ] TDA4VM: gPTP Synchronization Failure over MAC2MAC connection in ETHFW or PDK ENET example.

    Part Number: TDA4VM Tool/software: Facing issue with gPTP synchronization when using a MAC2MAC connection in either the ETHFW or PDK ENET example.

  • [FAQ] TDA4VH-Q1: How do I configure CPSW MAC Port as gPTP clock Master/Slave in Ethernet Firmware (ETHFW) or ENET examples?

    Part Number: TDA4VH-Q1 Tool/software: How do I configure/enable CPSW MAC Port as either gPTP clock Master or clock slave in Ethernet Firmware (ETHFW) or ENET examples?

  • [FAQ] TDA4VH-Q1: How to implement vx_delay functionality using graph parameters

    Part Number: TDA4VH-Q1 Tool/software: As per tiovx documentation, It is not recommended to use vx_delay objects when using pipelining with TIOVX. The delay objects will unintentionally create serializations in the graph and break the desired pipelining…

  • [FAQ] TDA4VH: ECAP LINUX FEATURE ON TDA4 BOARDS

    Part Number: TDA4VH Tool/software: How to enable ECAP in linux on TDA4 boards?

  • [FAQ] AM62P: Enabling BT.656 mode in DSS

    Part Number: AM62P Tool/software: This FAQ describes how to enable BT.656 in embedded syncs mode for AM62P. Similar patch can be created for other AM6x SoCs as well.

  • [FAQ] AM62P / AM62P-Q1 Custom board hardware design – Power supply connection and Board layout recommendations to support HS400

    Part Number: AM62P Tool/software: Hi TI Expeets, Can you provide information for AM62P HS400 support.

  • [FAQ] AM625 / AM623 / AM620-Q1 / AM625-Q1 / AM625SIP / AM62L / AM62Ax / AM62D-Q1 / AM62Px / AM64x / AM243x (ALV, ALX) Custom board hardware design – Clock Tree Tool

    Part Number: AM62A3 Other Parts Discussed in Thread: AM62L Tool/software: Hi TI Experts, Do you have suggestion for me to perform an analysis of the clock architecture for the AM62x, AM62L, AM62Ax, AM62Px and AM64x processor families

  • [FAQ] TDA4VL-Q1: Enabling and testing Inline ECC for DDR

    Part Number: TDA4VL-Q1 Tool/software: How to enable and perform single and double bit error injection on inline ECC for DDR?

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