Texas Instruments (TI) Processors support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search processors content or ask technical support questions on Sitara™ processors, digital signal processors (DSP) and automotive processors. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions

  • [FAQ] TDA4VM: Why does my board enter an abort state after running my application for a long time?

    Part Number: TDA4VM Other Parts Discussed in Thread: SYSBIOS I am running my deep learning application on a custom board for a very long time, but after 2 to 48 hours the deep learning application hangs/freezes and enters an abort state while running…

  • [FAQ] TDA4VM: Clarification on DMIPS calculation for A72

    Part Number: TDA4VM -1- Are you aware of any threads where calculation of DMIPS for an algorithm is discussed for TDA4VM ? -2- I see in TRM “One dual-core 64-bit Arm Cortex-A72 microprocessor subsystem at up to 2.0 GHz and up to 24K DMIPS” 24K…

  • [FAQ] TDA4VM: Maximum pressure or force allowed on package lid of SoC

    Part Number: TDA4VM For the following SoCs: AM57x DRA6x DRA7x DRA8x TDA2x TDA3x TDA4x (And probably any other SoC created by TI, all of which use similar styles of solder balls) FAQ: How much pressure is allowed to be placed onto…

  • [FAQ] TDA4VM: Booting MCU2_1 application form SBL

    Part Number: TDA4VM Hi, Section “6.3.3.2” of TDA4VM TRM states: “ In split mode, each R5F core works completely independent from the other (asymmetric multi-processing, or AMP). Each core uses its own RAMs and interfaces, with no coherence between…

  • [FAQ] 66AK2H12: UART examples for K2H EVM in DSP core

    Part Number: 66AK2H12 How to run UART examples in TI-RTOS SDK for K2H EVM in CCS?

  • [FAQ] Sitara multicore system design: How to ensure computations occur within a set cycle time?

    Part Number: AM6442 I am designing a system with a Sitara multicore device (e.g., AM24x, AM64x, AM65x). The processor needs to complete certain activities within a set cycle time. How do I design my system to make sure that I can meet that cycle time…

  • [FAQ] 66AK2H12: Target configuration in CCS for K2H

    Part Number: 66AK2H12 Other Parts Discussed in Thread: 66AK2H14 , How to create target configuration K2H(66AK2H12, 66AK2H12 and 66AK2H14) EVM in CCS?

  • [FAQ] TDA4VM: DRA829/DRA821: How to boot from eMMC boot1 partition

    Part Number: TDA4VM Other Parts Discussed in Thread: CSD , DRA829 , , DRA821 Typically eMMC boot happens from boot0 partition. Can we boot from boot1 partition of eMMC? If yes how to achieve the boot1 partition booting

  • [FAQ] 66AK2H12: GEL file Loading (DSP and ARM core) in K2H EVM

    Part Number: 66AK2H12 How to load and run GEL file (For DSP and ARM core) in K2H EVM?

  • [FAQ] PROCESSOR-SDK-K2H: Updating the firmware in XDS200 On-board debug emulator for EVMK2E (66AK2E02, 66AK2E05)

    Part Number: 66AK2E02 How to update the firmware for XDS200 On-board debug emulator in the K2E Family( 66AK2E02 and 66AK2E05 ) and the C6657 family (C6652, C6654, C6655, and C6657)?

View FAQ threads
  • Threads 197745 Discussions