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Clock & timing

Clock & timing

Clock & timing forum

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Texas Instruments (TI) Clock & timing support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search clock & timing IC content or ask technical support questions on everything from clock synchronizers and generators to clock buffers and timers. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.

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Frequent questions
  • [FAQ] LMK5B33216: Determining impact of supply voltage noise and PSNR specification on output phase noise

    Timothy T
    Timothy T
    Part Number: LMK5B33216 This covers the math to simulate clock output phase noise noise as a result of voltage supply noise using PSNR and then creating a voltage supply noise mask based on your requirements. How to use PSNR data and input voltage…
    • 4 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] The What and How of TI DPLLs (What is a DPLL? How does a DPLL work?)

    Jennifer Bernal
    Jennifer Bernal
    Part Number: LMK5B33216 [DPLL Training Slides] The What-How of TI DPLLs_share, e2e.pdf
    • 4 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] PLLATINUMSIM-SW: PLL Training Material

    Dean Banerjee
    Dean Banerjee
    Part Number: PLLATINUMSIM-SW Attached is a detailed training on PLL Theory PLL Fundamentals Full Training (Public).pdf
    • 4 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] LMK5B33216: How to choose the loop bandwidth for your PLL

    Timothy T
    Timothy T
    Part Number: LMK5B33216 Here's some information on choosing a loop bandwidth for your PLL to optimize noise performance. The presentation starts with some general theory on noise and PLLs, discusses how to pick loop bandwidth for a "PLL/VCO optimized…
    • 4 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] TLC555: What are the performance differences expected for TLC555 PCN 20231130002.1?

    Ron Michallick
    Ron Michallick
    Part Number: TLC555 Other Parts Discussed in Thread: , TLC3555-Q1 , TLC3555 Tool/software: PCN 20231130002.1 is the “Qualification of RFAB using qualified Process Technology, Die Revision, Datasheet update and additional Assembly Site/BOM options…
    • Answered
    • 8 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Does TI have crosses for obsolete Analog Devices HMC103x, HMC7xx, HMC8xx PLL family products and other discontinued products such as ADF5610 and HMC987 as per the Product Discontinuance Notice issued by ADI on March 22, 2022?

    Vibhu  Vanjari
    Vibhu Vanjari
    TI’s wide portfolio of RF PLLs & synthesizers features devices that are potential crosses for Analog Devices HMC103x, HMC7xx, HMC8xx PLL family products and other discontinued products such as ADF5610 and HMC987. With most of TI’s RF PLLs & synthesizers…
    • over 3 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] TPL5010: How to disable the watchdog function of TPL5010

    Dong Shen1
    Dong Shen1
    Part Number: TPL5010 Hi all, I am a FAE of TI,now my customer has a watchdog disabled problem, so I synchronously ask you for a solution: Problem Description: the customer's MCU wants to disable the watchdog function during the recording program…
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Clock Buffers: How to connect the unused pins?

    Kia Rahbar
    Kia Rahbar
    When a pin on my clock buffer is not being used, what is the correct termination?
    • Answered
    • over 5 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Clock Buffers: Can my buffer handle an input while it is powered off?

    Aaron Black
    Aaron Black
    If my buffer is powered off can an input go into the device without damaging it?
    • Answered
    • over 5 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] RF synthesizers: How to deal with the unused output differential pin in a RF synthesizer?

    Noel Fung
    Noel Fung
    I need single-ended output, how to deal with the unused output differential pin?
    • Answered
    • over 5 years ago
    • Clock & timing
    • Clock & timing forum
>

View FAQ threads
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  • Not Answered

    LMK05318B: LMK05318B tcs setting 0 Locked

    449 views
    1 reply
    Latest over 1 year ago
    by Jennifer Bernal
  • Not Answered

    LMK05318B: LMK05318B shows spurious after change registers 0 Locked

    345 views
    7 replies
    Latest over 1 year ago
    by Connor Lewis
  • Suggested Answer

    LMK05318B: LMK05318B output need 25ppm drift 0 Locked

    314 views
    1 reply
    Latest over 3 years ago
    by Jennifer Bernal
  • Answered

    LMK05318B: LMK05318B lvcmos+- balun ? 0 Locked

    160 views
    2 replies
    Latest 4 months ago
    by Luca Meloni
  • Answered

    LMK05318B: LMK05318B cannot output 153.6MHz and 491.52MHz at the same time 0 Locked

    431 views
    3 replies
    Latest over 3 years ago
    by Julian Hagedorn
  • Suggested Answer

    LMK05318B: LMK05318B C code 0 Locked

    323 views
    1 reply
    Latest over 1 year ago
    by Riley Nguyen
  • Suggested Answer

    LMK05318B: LMK05318B application questions 0 Locked

    389 views
    1 reply
    Latest over 1 year ago
    by Riley Nguyen
  • Answered

    LMK05318B: LMK05318B 1PPS Input- output phase lock time at ZDM 0 Locked

    555 views
    1 reply
    Latest over 1 year ago
    by Jennifer Bernal
  • Not Answered

    LMK05318B: LMK05318B - Output frequency error - when using 1pps 0 Locked

    1573 views
    16 replies
    Latest over 1 year ago
    by Riley Nguyen
  • Suggested Answer

    LMK05318B: LMK05318B 0 Locked

    331 views
    11 replies
    Latest 6 months ago
    by Jennifer Bernal
  • Answered

    LMK05318B: LMK05318B 0 Locked

    1052 views
    12 replies
    Latest over 4 years ago
    by Christian Sillans
  • Answered

    LMK05318B: lmk05318 XO_P and XO_N pull down issue 0 Locked

    347 views
    1 reply
    Latest over 4 years ago
    by Amin Eshraghi
  • Answered

    LMK05318B: LMK05318 two output clock config (output 180.25MHz and 24.576MHz at the same time) 0 Locked

    869 views
    8 replies
    Latest over 3 years ago
    by Jennifer Bernal
  • Answered

    LMK05318B: Jitter attenuation 0 Locked

    437 views
    1 reply
    Latest over 1 year ago
    by Jennifer Bernal
  • Answered

    LMK05318B: Is there easy way to change the frequency plan? 0 Locked

    402 views
    3 replies
    Latest over 4 years ago
    by Kia Rahbar
  • Answered

    LMK05318B: Is it possible to remove power to unused outputs of LMK05318B? 0 Locked

    357 views
    1 reply
    Latest over 4 years ago
    by Kia Rahbar
  • Answered

    LMK05318B: Is it possible to generate 8 outputs in APLL only mode 0 Locked

    538 views
    8 replies
    Latest over 2 years ago
    by Evan Su
  • Answered

    LMK05318B: Is changing APLL2 fractional numerator to move output a couple ppm hitless? 0 Locked

    394 views
    5 replies
    Latest over 4 years ago
    by Kia Rahbar
  • Not Answered

    LMK05318B: Incorrect frequency at OUT7 when outputting 156.25MHz, suspecting wrong divider ratio 0 Locked

    516 views
    6 replies
    Latest over 5 years ago
    by Weichao Xu
  • Answered

    LMK05318B: In program sequence can default values be used for masked bits (instead of read/modify/write)? 0 Locked

    329 views
    1 reply
    Latest over 4 years ago
    by Kia Rahbar
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