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Clock & timing

Clock & timing

Clock & timing forum

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Texas Instruments (TI) Clock & timing support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search clock & timing IC content or ask technical support questions on everything from clock synchronizers and generators to clock buffers and timers. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.

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Frequent questions
  • [FAQ] LMK5B33216: Determining impact of supply voltage noise and PSNR specification on output phase noise

    Timothy T
    Timothy T
    Part Number: LMK5B33216 This covers the math to simulate clock output phase noise noise as a result of voltage supply noise using PSNR and then creating a voltage supply noise mask based on your requirements. How to use PSNR data and input voltage…
    • 1 month ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] The What and How of TI DPLLs (What is a DPLL? How does a DPLL work?)

    Jennifer Bernal
    Jennifer Bernal
    Part Number: LMK5B33216 [DPLL Training Slides] The What-How of TI DPLLs_share, e2e.pdf
    • 1 month ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] PLLATINUMSIM-SW: PLL Training Material

    Dean Banerjee
    Dean Banerjee
    Part Number: PLLATINUMSIM-SW Attached is a detailed training on PLL Theory PLL Fundamentals Full Training (Public).pdf
    • 1 month ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] LMK5B33216: How to choose the loop bandwidth for your PLL

    Timothy T
    Timothy T
    Part Number: LMK5B33216 Here's some information on choosing a loop bandwidth for your PLL to optimize noise performance. The presentation starts with some general theory on noise and PLLs, discusses how to pick loop bandwidth for a "PLL/VCO optimized…
    • 1 month ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] TLC555: What are the performance differences expected for TLC555 PCN 20231130002.1?

    Ron Michallick
    Ron Michallick
    Part Number: TLC555 Other Parts Discussed in Thread: , TLC3555-Q1 , TLC3555 Tool/software: PCN 20231130002.1 is the “Qualification of RFAB using qualified Process Technology, Die Revision, Datasheet update and additional Assembly Site/BOM options…
    • Answered
    • 5 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Does TI have crosses for obsolete Analog Devices HMC103x, HMC7xx, HMC8xx PLL family products and other discontinued products such as ADF5610 and HMC987 as per the Product Discontinuance Notice issued by ADI on March 22, 2022?

    Vibhu  Vanjari
    Vibhu Vanjari
    TI’s wide portfolio of RF PLLs & synthesizers features devices that are potential crosses for Analog Devices HMC103x, HMC7xx, HMC8xx PLL family products and other discontinued products such as ADF5610 and HMC987. With most of TI’s RF PLLs & synthesizers…
    • over 3 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] TPL5010: How to disable the watchdog function of TPL5010

    Dong Shen1
    Dong Shen1
    Part Number: TPL5010 Hi all, I am a FAE of TI,now my customer has a watchdog disabled problem, so I synchronously ask you for a solution: Problem Description: the customer's MCU wants to disable the watchdog function during the recording program…
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Clock Buffers: How to connect the unused pins?

    Kia Rahbar
    Kia Rahbar
    When a pin on my clock buffer is not being used, what is the correct termination?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Clock Buffers: Can my buffer handle an input while it is powered off?

    Aaron Black
    Aaron Black
    If my buffer is powered off can an input go into the device without damaging it?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] RF synthesizers: How to deal with the unused output differential pin in a RF synthesizer?

    Noel Fung
    Noel Fung
    I need single-ended output, how to deal with the unused output differential pin?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
>

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  • Not Answered

    [FAQ] The What and How of TI DPLLs (What is a DPLL? How does a DPLL work?) 0

    249 views
    1 reply
    Latest 1 month ago
    by Timothy T
  • Not Answered

    CDCLVP111-EP: Not connected outputs termination 0

    19 views
    0 replies
    Started 16 hours ago
    by Noam Weidenfeld
  • Not Answered

    LMKDB1120: LMKDB1120 OrCAD library 0

    13 views
    0 replies
    Started 17 hours ago
    by Sean Liao (Yu-Sheng)
  • Suggested Answer

    LMK05318BEVM: BAW not lock after status read 0

    323 views
    15 replies
    Latest 1 day ago
    by Noel Fung
  • Not Answered

    LMK5B33216: Config review 0

    11 views
    0 replies
    Started 1 day ago
    by Daniel Waleniak
  • Not Answered

    CDCE6214: R15 reset register value 0

    18 views
    0 replies
    Started 2 days ago
    by Shuhei Goto
  • Suggested Answer

    LMX2624-SP: Programming registers: datasheet inconsistency 0

    70 views
    4 replies
    Latest 2 days ago
    by Noel Fung
  • Not Answered

    LMX2595: Could not change the frequency 0

    43 views
    2 replies
    Latest 2 days ago
    by Noel Fung
  • Not Answered

    LMK05318: Phase noise of LMK05318 0

    28 views
    1 reply
    Latest 2 days ago
    by Connor Lewis
  • Suggested Answer

    LMX2491: LMX2491/2 External Trigger Issues 0

    60 views
    4 replies
    Latest 2 days ago
    by Noel Fung
  • Not Answered

    LMK3H0102: FTDI Interface is disabled 0

    19 views
    0 replies
    Started 2 days ago
    by 3983096
  • Suggested Answer

    CDCE6214: CDCE6214 on custom board—OUT4 and Y0 not toggling (PRIREF vs SECREF input difference vs TMDS64EVM) 0

    33 views
    1 reply
    Latest 3 days ago
    by Sandra Saba
  • Not Answered

    CDCE6214: Oscillator probing issue with CDCLVC1310RHBR & CDCE6214RGET (ASDMB-25.000MHZ-LY-T) 0

    67 views
    4 replies
    Latest 3 days ago
    by Sandra Saba
  • Suggested Answer

    CDCLVC1310: Why is the clock not observable directly at MEMS oscillator output, but present after single‑ended buffer? 0

    106 views
    7 replies
    Latest 3 days ago
    by vicente flores prado
  • Answered

    LMK1C1102: Could you provide the IBIS model for the LMK1C1102PWR? 0

    42 views
    2 replies
    Latest 4 days ago
    by shirakata.yuto
  • Suggested Answer

    LMKDB1202: Does the Automatic Output Disable depend only on the currently selected input? 0

    48 views
    1 reply
    Latest 4 days ago
    by vicente flores prado
  • Answered

    CDCE913: Regarding the Power-Up Sequence 0

    80 views
    3 replies
    Latest 4 days ago
    by Sandra Saba
  • Suggested Answer

    SN74SSQEC32882: IBIS model 0

    78 views
    4 replies
    Latest 4 days ago
    by vicente flores prado
  • Not Answered

    LMK5B33414: Sub-ns synchronization of two independent 10 MHz clocks GNSS-referenced 0

    66 views
    2 replies
    Latest 5 days ago
    by Connor Lewis
  • Not Answered

    LMK04828: LMK04828BISQE/NOPB consult 0

    40 views
    1 reply
    Latest 5 days ago
    by Michael Srinivasan
>