TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Interface

Interface

Interface forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] DP83822I: Link up debug with DP83822

    Hillman Lin
    Hillman Lin
    Part Number: DP83822I
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83822I: 822/826 Odd Nibble Detection disable for EtherCAT application

    Hillman Lin
    Hillman Lin
    Part Number: DP83822I For 822/826 PHYs, Odd Nibbles Detection register need to be disable in order to prevent unexpected link loss in EtherCAT application. DP83826PHY: Odd Nibble Detection could be disable by strap 1 CLKOUT/LED1 pin in enhanced…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] Can Auto-negotiation link up with Force mode on 100mbps?

    Hillman Lin
    Hillman Lin
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83822IF: Fiber Link Status

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Part Number: DP83822IF Other Parts Discussed in Thread: DP83822HF , The DP83822IF and DP83822HF are the fiber capable variants of the DP83822. Bit 2 in Register 0x0001 indicates link status for both Copper and Fiber modes of operation. In copper mode…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] Extended Register Space Access for Ethernet PHYs

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Our Ethernet PHYs have a standard set of registers, 0x0-0x1F, that can be accessed in a straight forward fashion. Registers beyond 0x1F require a different approach to access. This FAQ is intended to provide a few examples on how to read/write these…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] SN65DSI86: SN65DSI86 Resolution Guide

    Allison Noe
    Allison Noe
    Part Number: SN65DSI86 What display resolution will the SN65DSI86 support?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: What is the default mode of RGMII when using DP83867, shift or align?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83867E When bootstrapped to be in RGMII mode, DP83867 will be in shift mode by default; not align mode. The modes will be corroborated via Reg 0x32[1:0].
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83869HM: How to generate 125MHz on CLKOUT pin for DP83869

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83869HM DP83869HM needs an additional register to be written to enable CLKOUT modification. By default, this signal is a buffered version of the XI signal. Reg 0xC6 must have 0x10 written in order for the value in Reg 0x170[12:8] to take…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] TI Ethernet PHY Capacitive Coupling (Transformerless Operation)

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Other Parts Discussed in Thread: DP83869 Summary: All of our Industrial Ethernet PHYs support Transformer-less Operation via Capacitive Coupling except for the DP83867. The DP83867 does not support Transformer-less Operation. List of Industrial…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: Ethernet PHY SGMII Vdiff Upper and Lower Input Limits

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Part Number: DP83867E Other Parts Discussed in Thread: DP83869 The DP83867 and DP83869 both have the same Vdiff Upper and Lower Input Limits of: 100 mV and 800 mV
    • over 2 years ago
    • Interface
    • Interface forum
<>

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Suggested Answer

    DS90UB953-Q1: AMI model 0 Locked

    139 views
    1 reply
    Latest over 3 years ago
    by Casey McCrea
  • Answered

    TMDS251: Can I swap A-B inputs and Y-Z outputs? 0 Locked

    304 views
    2 replies
    Latest over 3 years ago
    by Mike Perkins
  • Answered

    SN55LVCP22-SP: LVDS receiver specifications - Vth and Vtl versus VID(HYS) hysteresis 0 Locked

    1219 views
    7 replies
    Latest over 3 years ago
    by David (ASIC) Liu
  • Suggested Answer

    SN65HVD3082E: Can "R" output terminal drive LED side of opt coupler with 15mA as maximum? 0 Locked

    327 views
    4 replies
    Latest over 3 years ago
    by Eric Schott1
  • Suggested Answer

    SN65LVDS100: SN65LVDS100 0 Locked

    307 views
    3 replies
    Latest over 3 years ago
    by David (ASIC) Liu
  • Suggested Answer

    Device recommendation 0 Locked

    185 views
    2 replies
    Latest over 3 years ago
    by David (ASIC) Liu
  • Not Answered

    TLK10232: XAUI to 10GBASE-KR Configuration 0 Locked

    994 views
    16 replies
    Latest over 3 years ago
    by Jaison Devassy
  • Not Answered

    PCA9546A: Request parts number that can use instead of PCA9546A 0 Locked

    191 views
    1 reply
    Latest over 3 years ago
    by Eric Hackett
  • Answered

    DS90UB921-Q1: test pattern no display 0 Locked

    309 views
    2 replies
    Latest over 3 years ago
    by zhang danfeng
  • Answered

    DS80PCI810: Question about signal detect monitor 0 Locked

    228 views
    2 replies
    Latest over 3 years ago
    by Takehiro Sato
  • Not Answered

    P82B715: Verification on P82B715DR design 0 Locked

    357 views
    3 replies
    Latest over 3 years ago
    by Clemens Ladisch
  • Answered

    DP83620-EVK: DP83620-EVK: SFP Transceiver compatibility 0 Locked

    856 views
    9 replies
    Latest over 3 years ago
    by Kallikuppa Sreenivasa
  • Answered

    DP83620: Looking for interface support and baremetal sources 0 Locked

    538 views
    12 replies
    Latest over 3 years ago
    by Kallikuppa Sreenivasa
  • Answered

    DP83TD510E-EVM: Communication between 2 Evaluation boards on 1 twisted pair - Eth 0 Locked

    328 views
    8 replies
    Latest over 3 years ago
    by Kallikuppa Sreenivasa
  • Not Answered

    DS90UB953-Q1EVM: Performing CTP tests on the EVM 0 Locked

    558 views
    27 replies
    Latest over 3 years ago
    by Nicholas Darash
  • Suggested Answer

    DS90UB940N-Q1: Do DES side host SOC and SER side host SOC both could be the master 0 Locked

    233 views
    1 reply
    Latest over 3 years ago
    by Ben Dattilo
  • Answered

    TPS25750: I2Cs_IRQ Pulse Time 0 Locked

    232 views
    1 reply
    Latest over 3 years ago
    by Chuck Branch
  • Answered

    DS90UB941AS-Q1: DS90UB941AS-Q1 Schematic review request 0 Locked

    213 views
    5 replies
    Latest over 3 years ago
    by Lysny Woodahl
  • Suggested Answer

    DS90UB941AS-Q1: Pin configuration check 0 Locked

    187 views
    3 replies
    Latest over 3 years ago
    by Casey McCrea
  • Answered

    TL16C750E: Question regarding baudrates at 3.3V 0 Locked

    216 views
    1 reply
    Latest over 3 years ago
    by Clemens Ladisch
<>