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Interface

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Interface forum

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Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] DP83822IF: Fiber Link Status

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Part Number: DP83822IF Other Parts Discussed in Thread: DP83822HF , The DP83822IF and DP83822HF are the fiber capable variants of the DP83822. Bit 2 in Register 0x0001 indicates link status for both Copper and Fiber modes of operation. In copper mode…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] Extended Register Space Access for Ethernet PHYs

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Our Ethernet PHYs have a standard set of registers, 0x0-0x1F, that can be accessed in a straight forward fashion. Registers beyond 0x1F require a different approach to access. This FAQ is intended to provide a few examples on how to read/write these…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] SN65DSI86: SN65DSI86 Resolution Guide

    Allison Noe
    Allison Noe
    Part Number: SN65DSI86 What display resolution will the SN65DSI86 support?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: What is the default mode of RGMII when using DP83867, shift or align?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83867E When bootstrapped to be in RGMII mode, DP83867 will be in shift mode by default; not align mode. The modes will be corroborated via Reg 0x32[1:0].
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83869HM: How to generate 125MHz on CLKOUT pin for DP83869

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83869HM DP83869HM needs an additional register to be written to enable CLKOUT modification. By default, this signal is a buffered version of the XI signal. Reg 0xC6 must have 0x10 written in order for the value in Reg 0x170[12:8] to take…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] TI Ethernet PHY Capacitive Coupling (Transformerless Operation)

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Other Parts Discussed in Thread: DP83869 Summary: All of our Industrial Ethernet PHYs support Transformer-less Operation via Capacitive Coupling except for the DP83867. The DP83867 does not support Transformer-less Operation. List of Industrial…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: Ethernet PHY SGMII Vdiff Upper and Lower Input Limits

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Part Number: DP83867E Other Parts Discussed in Thread: DP83869 The DP83867 and DP83869 both have the same Vdiff Upper and Lower Input Limits of: 100 mV and 800 mV
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] What capacitance should my ESD diode be?

    Ethan Sempsrott
    Ethan Sempsrott
    Other Parts Discussed in Thread: ESD2CANXL24-Q1 , ESD2CAN24-Q1 , ESD2CANFD24-Q1 , ESD122 What should be considered when selecting a diode with parasitic capacitance?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83825I: How to adjust the Output Differential Voltage (VOD) of the DP83825I

    David Creger
    David Creger
    4540.DP83825I VOD Adjustment.pptx
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TG720R-Q1: Why is my SGMII eye measurement distorted?

    Melissa Chang
    Melissa Chang
    Part Number: DP83TG720R-Q1 SGMII signal is high frequency low-voltage differential signal. Both layout design and measurements need to be accurate for good eye diagram capture. Common board design guidelines: 100ohms+/-10% differential traces…
    • over 2 years ago
    • Interface
    • Interface forum
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  • Answered

    DP83869HM: No interrupt when pinging in MII mode 0 Locked

    1829 views
    30 replies
    Latest over 1 year ago
    by Sven Posner
  • Answered

    PCA9306-Q1: PCA9306TDCURQ1 without pull-up resistors on the I2C lines of VREF2 0 Locked

    512 views
    1 reply
    Latest over 1 year ago
    by Clemens Ladisch
  • Suggested Answer

    SN75DPHY440SS: Failure mode information to make FMEA 0 Locked

    399 views
    1 reply
    Latest over 1 year ago
    by David (ASIC) Liu
  • Answered

    SN65HVD78: Does SN65HVD78DGK supports RS-422? 0 Locked

    477 views
    4 replies
    Latest over 1 year ago
    by Choon Soo Kim
  • Not Answered

    DP83826E: DP83826E KSZ8081MNX compatibility issues 0 Locked

    815 views
    12 replies
    Latest over 1 year ago
    by Hillman Lin
  • Answered

    DP83826I: Interrupt function of DP83826 0 Locked

    395 views
    4 replies
    Latest over 1 year ago
    by Ryuuichi machida
  • Not Answered

    AM26LV31E: Unexpected Output with A low, and Y going high 0 Locked

    389 views
    3 replies
    Latest over 1 year ago
    by BOBBY
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    XIO3130: PCIE Switch IC XIO3130 issue 0 Locked

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    3 replies
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    by David Waier
  • Suggested Answer

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    614 views
    4 replies
    Latest over 1 year ago
    by BOBBY
  • Answered

    SN65LBC174: RS422 wire break with the SN65LBC174 transceiver 0 Locked

    332 views
    1 reply
    Latest over 1 year ago
    by BOBBY
  • Suggested Answer

    DS90UB926Q-Q1: Is there a relative matching table 0 Locked

    309 views
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    Latest over 1 year ago
    by Esther Chang
  • Answered

    TFP410: Can the chip support 720p at 120Hz refresh rate? 0 Locked

    290 views
    1 reply
    Latest over 1 year ago
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  • Answered

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    528 views
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    by Amy
  • Not Answered

    TUSB211A-Q1: please review schematic 0 Locked

    308 views
    3 replies
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    by Ryan Kitto
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    ONET1151L: Current Noise Density 0 Locked

    297 views
    3 replies
    Latest over 1 year ago
    by Nasser Mohammadi
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    1693 views
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    by Nick Peabody
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    336 views
    3 replies
    Latest over 1 year ago
    by Vishesh Pithadiya
  • Not Answered

    SN65DPHY440SS: The latency loss and time delay confirmation of SN65DPHY440SS 0 Locked

    285 views
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