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Frequent questions

  • [FAQ] MCU-PLUS-SDK-AM243X: System reset is needed for ENET(ICSSG/CPSW) based examples

    Part Number: MCU-PLUS-SDK-AM243X In case of enet_lwip_icssg and enet_lwip_cpsw examples(inclusive of other CPSW and ICSSG examples also): We see assert when we try to run example again after doing CPU reset in CCS, why is it the case?

  • [FAQ] AM2732-Q1: How to create custom Target configurations (like MCAL) and load compiled binaries to the SoC?

    I have compiled my CCS projects / MCAL libraries & examples and have binaries with me, how should I be loading or testing them on my board?

  • [FAQ] What are the TI deliverables for security in MCU+ devices ?

    Other Parts Discussed in Thread: SYSCONFIG Q1 : Does TI devices support hardware accelerators ? Q2 : What type of supports are present in the hardware ? Q3. How does application core interact with security core ? Q4. What are different configuration…

  • [FAQ] AM263x: What is the “SC1” feature in the IBIS Model?

    In the AM263x IBIS Model. What is the “SC1” feature? Can it be enabled/disabled in firmware? Is this is related to silicon binning or some other functionality?

  • [FAQ] AM2634: How to read internal temperature of the chip using Thermal Manager module

    Part Number: AM2634 Am263 supports thermal management of the device by providing control of on-chip temperature sensors. How to access these sensors to get the SOC temperature?

  • [FAQ] AM2634: How to choose & setup the Dual core with Lockstep feature?

    Part Number: AM2634 Other Parts Discussed in Thread: SYSCONFIG Hi, I have gone through the datasheet & TRM of AM2634 for the Dual core and lockstep concept. I am clear on the concept but to begin with the activities, I'm unsure on how to get this configured…

  • [FAQ] TMS570LS1224: After RAM groups self-test is executed using pbistRun() routine generated by HALCOGen, I am not able to access DMA RAM and SRAM. What causes this problem?

    Part Number: TMS570LS1224 Other Parts Discussed in Thread: HALCOGEN The PBIST DMA RAM test and PBIST SRAM test pass without any issue. The application is not able to access the SRAM or DMA RAM some times.

  • [FAQ] TMS570LC4357: Questions regarding FEE (EEPROM) usage on Hercules Microcontrollers

    Part Number: TMS570LC4357 What are the difference between EEPROM and Flash Emulated EEPROM (FEE)? Is emulated EEPROM protected by ECC, and h ow to enable FEE ECC check? How can I enable the single and double bit Error Corrections? Is Checksum…

  • [FAQ] TMS570LS0714: The pin 39 is used for MibSPI1CS[3] and N2HET1[21]. The TRM, datasheet, and HALCOGen don't have PINMUX definition for those two pins. How can I configure pin 39 as N2HET1[21]?

    Part Number: TMS570LS0714 Other Parts Discussed in Thread: HALCOGEN The TRM, datasheet, and HALCOGen don't have PINMUX definition for those two pins. How can I configure pin 39 as N2HET1[21]?

  • [FAQ] MCU-PLUS-SDK-AM243X: Configure Static IP with MCU+ SDK enet_lwip_cpsw or enet_lwip_icssg example

    Part Number: MCU-PLUS-SDK-AM243X Other Parts Discussed in Thread: DP83869 Hi, Can you please share steps to configure Static IP with MCU+ SDK enet_lwip_cpsw or enet_lwip_icssg example? Regards, Prasad

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