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Frequent questions

  • [FAQ] TDA4VM: Query regarding CPSW9 MAC port mapping with PHYs

    Part Number: TDA4VM Hi All, The 8 ports on J721E is divided like this RGMII Ports - 1,3,4,8. QSGMII ports - 2,5,6,7 1. The CPSW mac ports is mapped sequentially with PHY. MAC0->RGMII port1, MAC1->RGMII port3 and so on. Am I correct? 2. If…

  • [FAQ] AM6442: What is the encryption throughput of Sitara AM64x?

    Part Number: AM6442 What is the encryption throughput I can reach with Sitara AM64x?

  • [FAQ] AM64x & AM24x: How do I tell if there is software support for a hardware feature?

    Part Number: AM6411 I found a hardware feature on AM64x or AM24x that I want to use in my design. How do I tell if TI provides software support for that feature?

  • [FAQ] TMS320C6678: How to flash the IBL ( Intermediate Boot loader ) into EEPROM and how to flash the application binary into NOR? How to boot the IBL + Application binary?

    Part Number: TMS320C6678 Hi How to flash the IBL ( Intermediate Boot loader ) into EEPROM and how to flash the application binary into NOR? How to boot the IBL + Application binary? on C6678 EVM using CCS 9.3

  • [FAQ] TDA4VM: Measuring power consumption of the device

    Part Number: TDA4VM Other Parts Discussed in Thread: INA226 , Hi what is the recommended way to measure power consumption of the device and can I get the power consumption for different components like the deep learning accelerators and the GPU? …

  • [FAQ] AM62: Power sequence of VDDSHV_MMCx

    In below Schematic power sequence, why separate VDDSHV_MMCx(VDDSHV5), but other 3.3V VDDSHVn connect to 3V3_SYS, 1.8V VDDSHV connect to 1V8_IO, if VDDSHV_MMCx(VDDSHV5 is 3.3V or 1.8V, can it connect to 3V3_SYS or 1V8_IO? Or the design…

  • [FAQ] TDA4VM: How to build C++ application from j721e PDK? Is there a demo example available?

    Part Number: TDA4VM Hi, I am trying to build C++ application from j721e but running into build errors. Is there a demo application that shows how to build a C++ application from PDK?

  • [FAQ] AM62x McSPI D0 and D1 direction in SPI bootmode

    I knew D0 and D1 are configurable as MOSI and MISO, but when in SPI bootmode, which pin of D0 and D1 is MISO and MOSI? is it configurable in SPI boot mode?

  • [FAQ] TMS320C6678: How to build and run the platform test on C6678 EVM ?

    Part Number: TMS320C6678 Hi, How to build and run the platform test on C6678 EVM ?

  • [FAQ] TMS320C6657: How to build and run the platform test on C6657 EVM ?

    Part Number: TMS320C6657 Hi, How to build and run the platform test on C6657 EVM ?

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