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Interface

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Interface forum

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Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] DP83TD510E: Can we use a transformer instead of Capacitor for AC coupling on the MDI side for DP83TD510?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TD510E Yes, transformer can be used for filtering out the DC signal when the data is passing through the MDI side. In fact, we use transformer to filter out the AC signal in the Power over Data Line (PoDL) application. Here are the…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] What is the difference between RMII slave signaling and RMII master signaling?

    Hillman Lin
    Hillman Lin
    RMII slave signaling is connecting 50MHz Crystal to two XI pin of the PHY and/or MAC RMII master signaling is connection 25MHz Crystal to one Master and provide a 50MHz reference lock through REF_CLK pin to the XI pin of the slave side. Slave side does…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC812R-Q1: How can I connect PHYs back to back over RMII?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TC812R-Q1 There are two type of mode that RMII can support: RMII normal mode and RMII Repeater mode: RMII normal mode is also known as MAC to PHY RMII connection. This mode is set as default mode in DP83TC812 so it did not need…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC811S-Q1: Why is Slave/Managed mode PHY linking up with Master/Autonomous PHY link partner?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83TC811S-Q1 Other Parts Discussed in Thread: DP83TC811R-Q1 When using DP83TC811S-Q1 (or DP83TC811R-Q1), and setting the PHY into managed mode as a slave device via bootstrapping settings, if this device is connected to a master link partner…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UH949-Q1: Disable HDCP to work with UB Deserializer

    Alex Reid1
    Alex Reid1
    Part Number: DS90UH949-Q1 Hello, My customer would like to use DS90 UH949 -Q1 devices in place of the DS90 UB949A -Q1 to keep production running. In reviewing the details they have the following questions. Can the HDCP function be disabled? If…
    • Answered
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] Why am I getting "clause-45 not supported" and "error-95" errors with PHY drivers?

    Vikram Sharma
    Vikram Sharma
    Possible reason can be : - "phy_read_mmd" and "phy_write_mmd" are not supported in your kernel version (if version is old). Possible solution to be evaluated : - Change "phy_write_mmd" to "phy_write_mmd_indirect" function and do the corresponding…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UB960-Q1: BIST Duration

    ReedKacz
    ReedKacz
    Part Number: DS90UB960-Q1 Hi Team, What is the recommended duration to run the BIST? Thanks Reed
    • Answered
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] How to select correct RGMII delay mode for PHY and MAC?

    Vikram Sharma
    Vikram Sharma
    RGMII standard asks for the introduction of delay in the clock (RX_CLK/TX_CLK) with respect to the respective data (RX_D*/RX_CTRL or TX_D*/TX_CTRL). This delay can be introduced at the source of the clock or at the receiver side. Following table should…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] How to select the crystal's ppm specification for an Ethernet system?

    Vikram Sharma
    Vikram Sharma
    Other Parts Discussed in Thread: DP83TC811 Ethernet data travels effectively from one MAC to another MAC with two Ethernet PHYs in between. Each of these 4 ICs can have their own reference clocks and crystal attached to each is the usual source of this…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867IR: DP83867 digital loopback fail, how to set MII and PCS loopback

    Richard Yang1
    Richard Yang1
    Part Number: DP83867IR Hi Team: Customer side need our help to find the root cause of DP83867 Communication failure issue from one failed board . could you please help to take a look at the attached , customer need to know How to enable MII and PCS…
    • over 4 years ago
    • Interface
    • Interface forum
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  • Answered

    SN75DPHY440SS: The requirement of configuration for strap mode repeater 0 Locked

    166 views
    1 reply
    Latest 6 months ago
    by J
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    TCA9517-Q1: Enable input potential System failure 0 Locked

    214 views
    3 replies
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    by Tyler Townsend
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    TCA9548A: Design request review for TCA9548A I2C connections 0 Locked

    231 views
    1 reply
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    by Katy West
  • Not Answered

    TMUXHS4212: design check for TMUXHS4212 0 Locked

    131 views
    1 reply
    Latest 6 months ago
    by Katy West
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    ESD2CANFD24-Q1: Capacitance difference between the two branches 0 Locked

    177 views
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    Latest 6 months ago
    by Bryan Rodriguez de San Miguel
  • Suggested Answer

    DS90UB941AS-Q1: Question about measuring margin using ALP program 0 Locked

    479 views
    7 replies
    Latest 6 months ago
    by Esther Chang
  • Answered

    TDES954: How to read a gpio state from tser953 (input) then output that state through gpio on tdes954. 0 Locked

    183 views
    1 reply
    Latest 6 months ago
    by Justin Phan
  • Answered

    DP83867IR: DP83867IRRGZR on Intel Amston Lake Platform – BIOS Integration and MAC Address Programming 0 Locked

    249 views
    3 replies
    Latest 6 months ago
    by J
  • Suggested Answer

    TMDS1204: GBL_CTLE_CTRL Register 0 Locked

    202 views
    5 replies
    Latest 6 months ago
    by Shane Hauser
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    SN65HVD230: The other system uses a 5V CAN transceiver, while my system uses a 3.3V CAN transceiver, resulting in differences in offset and logic voltage levels. 0 Locked

    456 views
    6 replies
    Latest 6 months ago
    by Sean Guo
  • Not Answered

    DP83867IR: DP83867IRRGZT For This part Number we End of Life is 12.9 Years from the 2015 0 Locked

    149 views
    1 reply
    Latest 6 months ago
    by J
  • Answered

    SN65LV1023A: Use of SN65LV1023A/SN65LV1224B as replacement for MAX9205/MAX9206 devices 0 Locked

    206 views
    2 replies
    Latest 6 months ago
    by Simon Newey
  • Suggested Answer

    speck check 0 Locked

    278 views
    5 replies
    Latest 6 months ago
    by Sailendra Kumar
  • Answered

    TCAL6408: Interrupt not coming it is always high 0 Locked

    167 views
    2 replies
    Latest 6 months ago
    by Akhil K R
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    TCAN1145-Q1: TCAN1145DMTRQ1 use RXD for Selective Wake-up 0 Locked

    205 views
    3 replies
    Latest 6 months ago
    by Sean Guo
  • Not Answered

    DS100BR410: DS100BR410 PCIe 3.0 + Clock signal 0 Locked

    126 views
    2 replies
    Latest 6 months ago
    by Gregory Kobyakov
  • Suggested Answer

    SN65DSI86: Max resolution supported in 4 lanes mode 0 Locked

    209 views
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    by Ikram Haque
  • Answered

    TUSB2E221: Power status 0 Locked

    119 views
    1 reply
    Latest 6 months ago
    by Ryan Kitto
  • Suggested Answer

    TCAN1145-Q1: TCAN1145 RXD status 0 Locked

    166 views
    1 reply
    Latest 6 months ago
    by Sean Guo
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    TCAN1042-Q1: Several questions confirmed 0 Locked

    192 views
    1 reply
    Latest 6 months ago
    by Sean Guo
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