TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Interface

Interface

Interface forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] DP83TD510E: What is the potential swing levels of DP83TD510E when linking up with link partner?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83TD510E
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] Ethernet PHY - Functional Safety FIT Rate, FMD and Pin FMA Reports

    James Lee
    James Lee
    We currently do not have Functional Safety FIT Rate, FMD, and Pin FMA Report available for devices released before DP83TC812.
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] What different types of Reset are available on a TI Ethernet PHY?

    David Creger
    David Creger
    There are four different types of resets available on a TI Ethernet PHY, each with it's own use case. Pin Reset: Activated by asserting the Reset pin low. Digital core is reset, link up process will restart. All internal registers will reinitialize…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] What is a WUP and how does a CAN transceiver send and receive a WUP on the BUS?

    Chris Ayoub
    Chris Ayoub
    Other Parts Discussed in Thread: TCAN1043A-Q1 Introduction Any CAN transceiver that has an Inhibit (INH) pin will also have a sleep mode. The purpose of the INH pin is to be able to automatically turn off the voltage regulator for your MCU/Board. This…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UB935-Q1: FPD-Link Data Rate 3Gbps?

    Casey McCrea
    Casey McCrea
    Part Number: DS90UB935-Q1 Does the DS90UB935-Q1 FPD-Link interface run at 3Gbps or 4Gbps?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UB954-Q1: CSI-2 Lanes SER vs. DES

    Casey McCrea
    Casey McCrea
    Part Number: DS90UB954-Q1 Does the number of CSI-2 lanes programmed for 954 need to match the number of input lanes for 953/935?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UB953-Q1: Imager Data Rate Support

    Casey McCrea
    Casey McCrea
    Part Number: DS90UB953-Q1 ​​​Can the DS90UB953-Q1 support my imager?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: How to force 10/100/1000 Mbps speed in Ethernet PHYs?

    Evan Mayhew
    Evan Mayhew
    Part Number: DP83867E Other Parts Discussed in Thread: USB-2-MDIO To force a specific speed, auto-negotiation is left enabled while disabling advertisements for all non-desired speeds. The scripts to do this in the USB-2-MDIO interface for the DP83867…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] How to read and write Ethernet PHY registers using a Linux terminal?

    David Creger
    David Creger
    There are several different tools available in a Linux environment to read and write registers on a TI PHY. Several of these options are listed below. MII read: This is the only command which can and must be used in U-boot. Stop the autoboot process…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC812S-Q1: How to disable 25MHz clock on clkout pin?

    Vikram Sharma
    Vikram Sharma
    Part Number: DP83TC812S-Q1 For DP83TC812S/R and DP83TC814-Q1 if clkout pin is not being used to provide a clock signal to another component, then it is recommended to shut down this clock output and reduce its impact on EM emissions. Clkout's output…
    • over 2 years ago
    • Interface
    • Interface forum
<>

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Answered

    TSER953: MIPI CSI-2 port switching 0 Locked

    376 views
    3 replies
    Latest over 2 years ago
    by Cindy Li
  • Suggested Answer

    2 TO 1 MUX for LVDS 0 Locked

    699 views
    5 replies
    Latest over 2 years ago
    by Kameron Hill
  • Suggested Answer

    DS90UH941AS-Q1: Enquire package drawing 0 Locked

    347 views
    1 reply
    Latest over 2 years ago
    by Jack Scherlag
  • Answered

    DP83869HM: Information regarding selection of magnetics 0 Locked

    556 views
    1 reply
    Latest over 2 years ago
    by Gokul Koraganji
  • Answered

    TCAL9539: Release timing. 0 Locked

    284 views
    3 replies
    Latest over 2 years ago
    by Tyler Townsend
  • Answered

    TUSB1002A: Biasing and AC coupling using both TUSB1002A with HD3SS3220 0 Locked

    355 views
    2 replies
    Latest over 2 years ago
    by David (ASIC) Liu
  • Answered

    DP83822I: Ethernet not working, no physical data flow. 0 Locked

    753 views
    7 replies
    Latest over 2 years ago
    by Jan Grulich
  • Answered

    DP83822I: Driver support in the SDK prebuilt binaries 0 Locked

    238 views
    3 replies
    Latest over 2 years ago
    by Jan Grulich
  • Not Answered

    DP83843: Looking for technical help on implementation in SYMBOL mode- 0 Locked

    378 views
    6 replies
    Latest over 2 years ago
    by Gokul Koraganji
  • Answered

    TDP142: SNOOPENZ buffer 0 Locked

    272 views
    1 reply
    Latest over 2 years ago
    by David (ASIC) Liu
  • Answered

    Can DP83826I VDDIO run at 2.5V? 0 Locked

    230 views
    2 replies
    Latest over 2 years ago
    by Gordon Leather
  • Answered

    DP83TC813R-Q1: How to determine which RGMII mode to use 0 Locked

    361 views
    1 reply
    Latest over 2 years ago
    by Gokul Koraganji
  • Answered

    TCA9517-Q1: Experts, please recommend a 3.3V to 5V level shifter & buffer if required 0 Locked

    444 views
    3 replies
    Latest over 2 years ago
    by Andre Murray
  • Answered

    DP83867E: Not able to link at 1Gbps without auto-neg 0 Locked

    452 views
    9 replies
    Latest over 2 years ago
    by Jean-Charles RIAND
  • Suggested Answer

    TPD2S703-Q1: cross list for TPS and TPD 0 Locked

    324 views
    1 reply
    Latest over 2 years ago
    by Leanne Zhang
  • Not Answered

    DP83869HM: Quad/ dual port transformers 0 Locked

    318 views
    7 replies
    Latest over 2 years ago
    by Hillman Lin
  • Not Answered

    DP83822I: Driver reconciliation and register setting issues 0 Locked

    323 views
    4 replies
    Latest over 2 years ago
    by Hillman Lin
  • Answered

    DS90UB947-Q1EVM: Dual LVDS support without clock 0 Locked

    584 views
    12 replies
    Latest over 2 years ago
    by Bruce Deng
  • Suggested Answer

    DS320PR412-421EVM: DS320PR412-421EVM 0 Locked

    234 views
    1 reply
    Latest over 2 years ago
    by Nasser Mohammadi
  • Suggested Answer

    TMUXHS4412: PCIE Gen 5 mux 0 Locked

    495 views
    1 reply
    Latest over 2 years ago
    by Drew Miller1
<>