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Frequent questions

  • [FAQ] AM263x/ AM263Px/ AM261x: What should I use in my multi-core application, IPC or Shared Memory?

    Part Number: AM2612 Hi experts, I see that the AM26x devices support Inter-Processor Communication between multiple R5F cores and include a mechanism to maintain shared memory across cores. What is recommended for my multi-core applications? When do…

  • [FAQ] MSPM33C321A: ARM Cortex-M33 VTOR Alignment Requirement

    Part Number: MSPM33C321A Per ARM architecture, VTOR must be aligned to: Alignment = Power of 2 ≥ (Number of vectors × 4) For MSPM33C321A: - ICTR register = 1 → Hardware supports 53 external IRQs (IRQ0- 52 ) - Total vectors = 16 (system exceptions…

  • [FAQ] MSPM0G3507: How to put the ISRs into SRAM for MSPM0 deivces

    Part Number: MSPM0G3507 Use function of DL_Interrupt_registerInterrupt to define all the interrupts that used.(This function will copy the vector table into SRAM then modify the interrupt offset address and modify the interrupt ISR entry address as…

  • [FAQ] MSPM0G3507: How to put the ISRs into SRAM for MSPM0 deivces

    Part Number: MSPM0G3507 Use function of DL_Interrupt_registerInterrupt to define all the interrupts that used.(This function will copy the vectory table into SRAM and modify the interrupt ISR entry address as needed) Example: DL_Interrupt_registerInterrupt…

  • [FAQ] MSPM0G3519: Advanced Timer Techniques in MSPM0 (application note - sdaa286)

    Part Number: MSPM0G3519 This E2E thread contains reference application codes for the Application Note titled- Advanced Timer Techniques in MSPM0. Advanced Timer (TIMA) peripherals in MSPM0 Devices are designed to meet the demands of modern embedded…

  • [FAQ] AM2634: Sending Large Amounts of Data from an AM263x SPI Slave with Minimal CS Deassertion Time

    Part Number: AM2634 Other Parts Discussed in Thread: SYSCONFIG In this FAQ, I explain an approach to transmit a large amount of data from an AM263x SPI slave device while keeping the chip select (CS) deassertion time to a minimum.

  • [FAQ] AM263P4: I2C OWN TArget Address

    Part Number: AM263P4 Other Parts Discussed in Thread: SYSCONFIG What is the meaning of I2C Own Target address in the syscfg file below. Is this related to the I2C controller or the I2C transmitter? What are the valid values it can take?

  • [FAQ] AM2634-Q1: How to enable LWIP host name in AM263

    Part Number: AM2634-Q1 LWIP enabled devices can get IP address from DHCP server based on host name. To enable this feature on LWIP stack, certain configuration needs to be done. - Let us pick the enet_cpsw_tcpserver example to enable this feature…

  • [FAQ] AM263P4: How to block ethernet packets with a particular unicast address?

    Part Number: AM263P4 Ethernet packets can be blocked or forwarded based on their packet addresses. Unicast address is a specific type of address that is intended for one to one communication. ALE in CPSW susbystem can be configured to drop packets…

  • [FAQ] AM2634-Q1: How can I persist a data structure from my code in flash storage on an AM263 microcontroller?

    Part Number: AM2634-Q1 Other Parts Discussed in Thread: SYSCONFIG , UNIFLASH This FAQ highlights how you make a datastructure to be stored in flash in AM263 microcontroller. Typically we can do this in AM263Px and AM261x microcontroller where XIP…

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