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Frequent questions

  • [FAQ] How to run OTP Keywriter on SK-AM64B

    Part Number: SK-AM64B Other Parts Discussed in Thread: TCA9538 Hello TI, I’m currently working on TI’s SK-AM64B boards, trying to move them from HS-FS to HS-SE mode. To do so, I’m using the OTP Keywriter tool with MCU+ SDK for AM64x in its latest…

  • [FAQ] AM62X-PET-CALC: AM62x Sysconfig power confict warning

    Part Number: AM62X-PET-CALC Hi TI When i finish the PINMUX config and power domain config, there is confict message show as below，Can i suppress these two warning ? As the MCU GPIO is 3v3 level ,so i connect the VDDSHV_MCU to 3v3 domain. BR…

  • [FAQ] AM64X: How to Run MCU+ SDK GPIO_INPUT_INTERRUPT example for R5FSS0-0 with Linux running on A53

    Part Number: AM6442 Problem Description The MCU+ SDK comes with a GPIO_INPUT_INTERRUPT example for R5FSS0-0. This example configures a GPIO pin to generate an interrupt and then registers an interrupt handler to service the GPIO interrupt. This example…

  • [FAQ] SK-AM62 : How to configure the GPIO interrupt on AM62X in MCU+SDK.

    Part Number: SK-AM62 What is GPIO? The General-Purpose Input/output (GPIO) peripheral provides dedicated general-purpose pins that can be configured as either inputs or outputs. GPIO can be used in three modes: *Input *Output *Interrupt …

  • [FAQ] TMS320C6678: Static IP Configuration using PDK

    Part Number: TMS320C6678 Other Parts Discussed in Thread: CCSTUDIO How to set Static and DHCP IP configuration using PDK in C667x and C665x family Processors ?

  • [FAQ] PROCESSOR-SDK-TDAX: How to reduce the number of completion rings in VHWA drivers

    Part Number: PROCESSOR-SDK-TDAX Other Parts Discussed in Thread: TDA4VM VHWA has totally 6 drivers in the PDK and each driver requires many DMA channels to do transfers. In addition to one main ring, each channel requires two additional rings, one for…

  • [FAQ] AM62x, AM64x: How to disable unused cores?

    I am not using one of the cores on my TI processor. How do I disable that core, so that I can free up more memory, peripherals, etc for my other cores? . This FAQ will use AM64x as an example, but the same concepts apply for AM62x. . NOTE: This…

  • [FAQ] AM3354 GP: JTAG port lock after production line

    Part Number: AM3354 Hi there, I am using the AM3354 CPU. For cybersecurity, I want the JTAG port to be protected, to avoid others read out our binary code. The CPU can only be full ereased after this protection. Please tell me how to achieve this…

  • [FAQ] TDA4VM: SDL LBIST POST Timeout

    Part Number: TDA4VM When testing SDL (Software Diagnostics Library) package on the TDA4VM, seeing LBIST HW POST Timeout logs as below. BIST Example Application Starting LBIST test on HWPOST - DMSC, index 0... HW POST MCU Status : SDL_LBIST_POST_TIMEOUT…

  • [FAQ] AM62x, AM64x: How to allow Linux to load M4F / R5F firmware by adding a resource table

    Part Number: AM6442 Other Parts Discussed in Thread: SYSCONFIG UPDATE: This FAQ has been replaced by the Multicore academy module, section "Application Development on Remote cores". Please refer to the associated processor academy. This FAQ will not…

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