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Hello TI experts,

Can the synchronous buck converters from the TPS6291x family (TPS62912, TPS62913, TPS62914, TPS62916 and TPS62918) be used a…

Tool/software:

We tested the TPS62912 in your evaluation board and are really happy with it.

However, our design needs the TPS62912 to be synchronised by a clock source which is powered by the output of the TPS62912.

Is there a…

Tool/software:

Dear Sir/Madam,

We are developing FMC card using TI Redriver TUSB1104 for our 10 Gbps, USB3.2, Gen2, 2x2 mode IP core testing. Host…

Tool/software:

Team, 

I hope you are doing well.

What is the current value on S-conf pin ? Thanks !

Tool/software:

We are trying to measure the noise density vs frequency and repeat the plot shown in the data sheet. Would you please suggest the setup/equipment used for this measurement? Thanks.

Tool/software:

Hi,

Quick question.

Is it possible to generate a -1.8V from TPS62912 with a +12V input?

I was thinking to switch GND and VOUT on the output of the switch regulator.

Br.

My design requires a very small footprint, and to do so I would like to put components of the power supply circuit on top and bottom layer.
Can I place the (shielded) inductor on bottom when…

Last year, I did several designs in power designer. I could access them by logging in.

Non of them is visible when I log in now. Can anyone help to get those designs back?

I am trying to use TPS62912 to power FPGA, but I want to run it in sync mode after initial phase of powering up.
What is correct sequence to start it with enable only and then add sync logic when FPGA will be functional. Is it possible…

Hi

I am looking at power options for IWR6443. The design should mostly prioritize noise performance, but keep an eye on power efficiency and thermal…

Hello,

As part of a Failure Modes and Effects Analysis we are performing on a power system based on the TPS62913, we need to consider the possibility of an open circuit on the resistor connected to the S-CONF pin, which will result…

Hi,

Below is my schematic arround TPS7A94  for my custom board, i have tried to maximum follow the EVK

But still i wish to know if there are any flaws in my layout

Kindly have a look and drop…

Hi,

I have done below layout for device TPS62912RPUR for my custom board, i have tried to maximum follow the EVK

But still i wish to know if there are any flaws in my layout

Kindly have a look and drop your valuabel comments

Lay…

Hi,

I started my approach of Schemati design from below suggestions and arrived at a final schematic in slno

1. Ultra Low Noise Power Chain for Photo Sensitive applications - Power management…

Hi,

I have a power rail requirement of below

This  Schematic Review request is in connection with suggestions of parts made in below thread

Ultra Low Noise Power Chain for Photo Sensitive applications - Power management…

Hello Team, 

any idea how to get the efficiency at low Vout, e.g. 1.2V@0.23A and 1.1V@0.5A >90%, please? With Webench simulation I cannot achieve this.

Thank you and Best Regards, 

Hans

Hi,

I need to design ultra low noise power supply for PID controller for our university laser research. Power consumption is estimated around 12V 200 mA for MCU, op amps and ADC/DAC. Output…

I am using TPS54120RGYT for Power supply to Analog Supply Below are my Schematic and Layout, Requested for comments.

Kindly review my layout for any blunt flaws, i have followed…

Hello,

I'm using a TPS62912 in my design, and notice that there is a large undervoltage transient at the end of the soft-start sequence on all four instances of this power supply on my…

Hi,

Below are my three different needs of powersupply for low noise applications(Analog Front end using THS4541 and ADC3669) for which i have chosen TPS54120…

 Hi team

Could you help recommend the correct devices for the following applications?

1. 3.3V to 0.9V/280mA, TA=65°C, PSRR @1khz>60dB
2. 3.3V to…