TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Interface

Interface

Interface forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] DP83822I: 822/826 Odd Nibble Detection disable for EtherCAT application

    Hillman Lin
    Hillman Lin
    Part Number: DP83822I For 822/826 PHYs, Odd Nibbles Detection register need to be disable in order to prevent unexpected link loss in EtherCAT application. DP83826PHY: Odd Nibble Detection could be disable by strap 1 CLKOUT/LED1 pin in enhanced…
    • over 1 year ago
    • Interface
    • Interface forum
  • [FAQ] Can Auto-negotiation link up with Force mode on 100mbps?

    Hillman Lin
    Hillman Lin
    • Answered
    • over 1 year ago
    • Interface
    • Interface forum
  • [FAQ] DP83822IF: Fiber Link Status

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Part Number: DP83822IF Other Parts Discussed in Thread: DP83822HF , The DP83822IF and DP83822HF are the fiber capable variants of the DP83822. Bit 2 in Register 0x0001 indicates link status for both Copper and Fiber modes of operation. In copper mode…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] Extended Register Space Access for Ethernet PHYs

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Our Ethernet PHYs have a standard set of registers, 0x0-0x1F, that can be accessed in a straight forward fashion. Registers beyond 0x1F require a different approach to access. This FAQ is intended to provide a few examples on how to read/write these…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] SN65DSI86: SN65DSI86 Resolution Guide

    Allison Noe
    Allison Noe
    Part Number: SN65DSI86 What display resolution will the SN65DSI86 support?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: What is the default mode of RGMII when using DP83867, shift or align?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83867E When bootstrapped to be in RGMII mode, DP83867 will be in shift mode by default; not align mode. The modes will be corroborated via Reg 0x32[1:0].
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83869HM: How to generate 125MHz on CLKOUT pin for DP83869

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83869HM DP83869HM needs an additional register to be written to enable CLKOUT modification. By default, this signal is a buffered version of the XI signal. Reg 0xC6 must have 0x10 written in order for the value in Reg 0x170[12:8] to take…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] TI Ethernet PHY Capacitive Coupling (Transformerless Operation)

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Other Parts Discussed in Thread: DP83869 Summary: All of our Industrial Ethernet PHYs support Transformer-less Operation via Capacitive Coupling except for the DP83867. The DP83867 does not support Transformer-less Operation. List of Industrial…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: Ethernet PHY SGMII Vdiff Upper and Lower Input Limits

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Part Number: DP83867E Other Parts Discussed in Thread: DP83869 The DP83867 and DP83869 both have the same Vdiff Upper and Lower Input Limits of: 100 mV and 800 mV
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] What capacitance should my ESD diode be?

    Ethan Sempsrott
    Ethan Sempsrott
    Other Parts Discussed in Thread: ESD2CANXL24-Q1 , ESD2CAN24-Q1 , ESD2CANFD24-Q1 , ESD122 What should be considered when selecting a diode with parasitic capacitance?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
<>

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Answered

    DP83TG720R-Q1: Please tell me the description of DLL_EN bit in A2D_REG_48 Register. (Address offset=0x430) 0 Locked

    247 views
    1 reply
    Latest over 2 years ago
    by Melissa Chang
  • Suggested Answer

    DP83867IR: DP83867 strap configuration 0 Locked

    560 views
    5 replies
    Latest over 2 years ago
    by Melissa Chang
  • Suggested Answer

    TCA6424A: any leakage current if I/O pin voltage (5V pull up) > Vcc (3.3V) 0 Locked

    344 views
    1 reply
    Latest over 2 years ago
    by Tyler Townsend
  • Suggested Answer

    DS90UB941AS-Q1: Is there need extra hardware design to achieve link fault diagnostics function 0 Locked

    221 views
    5 replies
    Latest over 2 years ago
    by Kate Hawkins
  • Answered

    SN55LVDS31: Theta Jc for W fab package 0 Locked

    306 views
    3 replies
    Latest over 2 years ago
    by Joshua Salinas
  • Suggested Answer

    SN65DSI86: How to enable the PSR function 0 Locked

    414 views
    5 replies
    Latest over 2 years ago
    by David (ASIC) Liu
  • Suggested Answer

    TS3USB221: thermal pad connection 0 Locked

    239 views
    1 reply
    Latest over 2 years ago
    by Brian Zhou
  • Suggested Answer

    XIO3130: PCIe Pocket Switch solution 0 Locked

    361 views
    1 reply
    Latest over 2 years ago
    by Clemens Ladisch
  • Suggested Answer

    CC1352R1- I@C pin confiration not working while defined inside code 0 Locked

    176 views
    1 reply
    Latest over 2 years ago
    by Sid
  • Answered

    DP83826E: DP83826 & RECR Register 0 Locked

    340 views
    2 replies
    Latest over 2 years ago
    by Jan D
  • Not Answered

    DP83869EVM: Not Able to Establish SGMII Link 0 Locked

    271 views
    2 replies
    Latest over 2 years ago
    by Gokul Koraganji
  • Suggested Answer

    DP83TC812R-Q1: replace by DP83TC818 0 Locked

    277 views
    2 replies
    Latest over 2 years ago
    by Gokul Koraganji
  • Not Answered

    DP83867ERGZ-S-EVM: Back to Back SGMII Link Register settings 0 Locked

    693 views
    14 replies
    Latest over 2 years ago
    by Rahul
  • Answered

    DS90C032QML-SP: Shielding 0 Locked

    228 views
    1 reply
    Latest over 2 years ago
    by Joshua Salinas
  • Suggested Answer

    DS90UB638-Q1: Application issues of chips 0 Locked

    164 views
    1 reply
    Latest over 2 years ago
    by Cindy Li
  • Suggested Answer

    ESD761: VRWM and VBRF 0 Locked

    359 views
    1 reply
    Latest over 2 years ago
    by Sebastian Muriel
  • Suggested Answer

    TLIN1027-Q1: When TLIN1027 use as K-LINE stander, what the maxium K-LINE speed it can support 0 Locked

    426 views
    3 replies
    Latest over 2 years ago
    by Danny Bacic
  • Not Answered

    DS250DF410: DS100DF410 retimer register configuration values for 10G single Lane XFI interface 0 Locked

    456 views
    4 replies
    Latest over 2 years ago
    by Evan Mayhew
  • Not Answered

    TUSB422: Charging Dock Design 0 Locked

    317 views
    7 replies
    Latest over 2 years ago
    by Brian Zhou
  • Suggested Answer

    TUSB7340: Pin delay 0 Locked

    249 views
    4 replies
    Latest over 2 years ago
    by Brian Zhou
<>