TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Interface

Interface

Interface forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] DP83TD510E: Can we use a transformer instead of Capacitor for AC coupling on the MDI side for DP83TD510?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TD510E Yes, transformer can be used for filtering out the DC signal when the data is passing through the MDI side. In fact, we use transformer to filter out the AC signal in the Power over Data Line (PoDL) application. Here are the…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] What is the difference between RMII slave signaling and RMII master signaling?

    Hillman Lin
    Hillman Lin
    RMII slave signaling is connecting 50MHz Crystal to two XI pin of the PHY and/or MAC RMII master signaling is connection 25MHz Crystal to one Master and provide a 50MHz reference lock through REF_CLK pin to the XI pin of the slave side. Slave side does…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC812R-Q1: How can I connect PHYs back to back over RMII?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TC812R-Q1 There are two type of mode that RMII can support: RMII normal mode and RMII Repeater mode: RMII normal mode is also known as MAC to PHY RMII connection. This mode is set as default mode in DP83TC812 so it did not need…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC811S-Q1: Why is Slave/Managed mode PHY linking up with Master/Autonomous PHY link partner?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83TC811S-Q1 Other Parts Discussed in Thread: DP83TC811R-Q1 When using DP83TC811S-Q1 (or DP83TC811R-Q1), and setting the PHY into managed mode as a slave device via bootstrapping settings, if this device is connected to a master link partner…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UH949-Q1: Disable HDCP to work with UB Deserializer

    Alex Reid1
    Alex Reid1
    Part Number: DS90UH949-Q1 Hello, My customer would like to use DS90 UH949 -Q1 devices in place of the DS90 UB949A -Q1 to keep production running. In reviewing the details they have the following questions. Can the HDCP function be disabled? If…
    • Answered
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] Why am I getting "clause-45 not supported" and "error-95" errors with PHY drivers?

    Vikram Sharma
    Vikram Sharma
    Possible reason can be : - "phy_read_mmd" and "phy_write_mmd" are not supported in your kernel version (if version is old). Possible solution to be evaluated : - Change "phy_write_mmd" to "phy_write_mmd_indirect" function and do the corresponding…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UB960-Q1: BIST Duration

    ReedKacz
    ReedKacz
    Part Number: DS90UB960-Q1 Hi Team, What is the recommended duration to run the BIST? Thanks Reed
    • Answered
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] How to select correct RGMII delay mode for PHY and MAC?

    Vikram Sharma
    Vikram Sharma
    RGMII standard asks for the introduction of delay in the clock (RX_CLK/TX_CLK) with respect to the respective data (RX_D*/RX_CTRL or TX_D*/TX_CTRL). This delay can be introduced at the source of the clock or at the receiver side. Following table should…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] How to select the crystal's ppm specification for an Ethernet system?

    Vikram Sharma
    Vikram Sharma
    Other Parts Discussed in Thread: DP83TC811 Ethernet data travels effectively from one MAC to another MAC with two Ethernet PHYs in between. Each of these 4 ICs can have their own reference clocks and crystal attached to each is the usual source of this…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867IR: DP83867 digital loopback fail, how to set MII and PCS loopback

    Richard Yang1
    Richard Yang1
    Part Number: DP83867IR Hi Team: Customer side need our help to find the root cause of DP83867 Communication failure issue from one failed board . could you please help to take a look at the attached , customer need to know How to enable MII and PCS…
    • over 4 years ago
    • Interface
    • Interface forum
<>

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Answered

    TUSB212: Absolute Maximum Ratings of DxP, DxM 0 Locked

    421 views
    2 replies
    Latest over 2 years ago
    by user6004480
  • Answered

    TS3USB31E: Absolute Maximum Ratings of HSD+, HSD–, D+, D– 0 Locked

    570 views
    2 replies
    Latest over 2 years ago
    by user6004480
  • Suggested Answer

    TLIN1021A-Q1: ISO17987-4 and ISO17987-7 0 Locked

    690 views
    1 reply
    Latest over 2 years ago
    by Eric Hackett
  • Discussion

    DS160PR810EVM-RSC: End device detection Locked

    1763 views
    49 replies
    Latest over 2 years ago
    by Evan Su
  • Suggested Answer

    DS90UB954-Q1: OUT+- LAYOUT layout requirements 0 Locked

    300 views
    1 reply
    Latest over 2 years ago
    by Cindy Li
  • Suggested Answer

    TCA9539-Q1: question about Internal Read Pulse Fequency 0 Locked

    459 views
    2 replies
    Latest over 2 years ago
    by BOBBY
  • Answered

    DS250DF230: Register for checking output status 0 Locked

    297 views
    1 reply
    Latest over 2 years ago
    by Drew Miller1
  • Suggested Answer

    DS90UB953A-Q1: DS90UB953 POC FILTER 0 Locked

    502 views
    3 replies
    Latest over 2 years ago
    by Zoe Bison
  • Suggested Answer

    XIO2001: XIO2001IZGU 0 Locked

    883 views
    6 replies
    Latest over 2 years ago
    by David Waier
  • Not Answered

    TCAN1044A-Q1: 5Mbps and 8 Mbps CAN communication 0 Locked

    991 views
    1 reply
    Latest over 2 years ago
    by Eric Schott1
  • Suggested Answer

    DP83822I: The EtherCAT clock interface requirement 0 Locked

    551 views
    1 reply
    Latest over 2 years ago
    by Gerome Cacho
  • Suggested Answer

    DP83848J: Need Help Correcting Swapped ETH_TX0 and ETH_TX1 Pins on DP83848 0 Locked

    450 views
    1 reply
    Latest over 2 years ago
    by Gerome Cacho
  • Answered

    SN75LVDT1422: Failure modes of the SN75LVDT1422 associated with setup/hold violations 0 Locked

    405 views
    3 replies
    Latest over 2 years ago
    by David (ASIC) Liu
  • Not Answered

    TCA9517-Q1: Output behavior when EN=L 0 Locked

    489 views
    2 replies
    Latest over 2 years ago
    by Tyler Townsend
  • Suggested Answer

    DS26C32AT: Device failure 0 Locked

    596 views
    7 replies
    Latest over 2 years ago
    by Parker Dodson
  • Suggested Answer

    THVD1520: Data Lost issue 0 Locked

    757 views
    2 replies
    Latest over 2 years ago
    by Parker Dodson
  • Suggested Answer

    TUSB1002A: USB3.0 redriver 0 Locked

    264 views
    1 reply
    Latest over 2 years ago
    by David (ASIC) Liu
  • Answered

    AM26C32M: The driver device that can be paired with AM26C32MDREP 0 Locked

    373 views
    4 replies
    Latest over 2 years ago
    by Parker Dodson
  • Suggested Answer

    TPD4E02B04: Common mode filter with ESD protection 0 Locked

    1025 views
    1 reply
    Latest over 2 years ago
    by McKenzie Eaker
  • Answered

    SN65DSI86-Q1: about pixel clock 0 Locked

    631 views
    2 replies
    Latest over 2 years ago
    by Shinji Mada
<>