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Logic

Logic

Logic forum

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Texas Instruments (TI) Logic support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search logic IC content or ask technical support questions on everything from voltage level translation and transceivers to standard logic gates and specialty logic devices. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] How do I size my external RC components surrounding Auto-Bi Directional Translators to fit my System Requirements?

    Jack Guan
    Jack Guan
    Part Number: TXB0108 TXB0102 LSF0102 LSF0101 TXS0104E LSF0108 LSF0002 TXB0104 TXB0106 TXB0101 TXS0108E TXS0101 TXS0102 LSF0204 Tool/software: Auto Bi-Directional translators demand additional design considerations over other translators, such as external…
    • 4 months ago
    • Logic
    • Logic forum
  • [FAQ]: My simulation in ICS is very slow - how do I fix it?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ The two biggest causes of slow simulation are: Fast oscillators and switching signals Large simulation timescales (simulations that take 1+ seconds) If the simulation is utilizing a square wave with a period that is…
    • 6 months ago
    • Logic
    • Logic forum
  • [FAQ] Are TPLDs pin-to-pin compatible with competitor devices?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ Numerous TPLD products are either pin to pin or layout compatible with competing products. Our products utilize standard, JEDEC packaging standards.
    • 6 months ago
    • Logic
    • Logic forum
  • [FAQ] Can my TPLD be changed after programming?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ Once a TPLD is permanently programmed or “burned” through OTP, the design cannot be changed. If you wish to change your design after permanently programming an OTP part, a new, previously unprogrammed part must be used.
    • 6 months ago
    • Logic
    • Logic forum
  • [FAQ] How is TPLD programmed?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ TPLD is programmed through SPI communication enabled by the programmer firmware and InterConnect Studio (ICS). Each TPLD device uses 5 pins to program the device: 4 pins for SPI communication and 1 pin (GPI) that provides a specific…
    • 6 months ago
    • Logic
    • Logic forum
  • [FAQ] What do I use to program TPLD?

    Malcolm Lyn
    Malcolm Lyn
    Other Parts Discussed in Thread: TPLD1201 FAQ: TPLD > Current FAQ TPLD is programmed through our software tool, InterConnect Studio (ICS) , in combination with a TPLD programmer and EVM. TPLD programmers and EVMs can be found on the “Hardware development…
    • 6 months ago
    • Logic
    • Logic forum
  • [FAQ] Can I permanently program TPLD in-system or in production myself?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ No, current devices do not support in-system or inline programming (support is planned for future devices). For large scale production, we recommend you have TI program the devices before shipping. Customers can program devices…
    • 6 months ago
    • Logic
    • Logic forum
  • [FAQ] Can a third party program TPLD for me?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ Yes. Currently TI has enabled Dediprog to work as a third party for programming TPLD.
    • 6 months ago
    • Logic
    • Logic forum
  • [FAQ] Can TI program TPLD for me?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ Customers can order devices for production through InterConnect Studio (ICS). TI can program devices (at no additional cost!) before shipping with the submitted design if the order quantity is one reel or more (3000 units). …
    • 6 months ago
    • Logic
    • Logic forum
  • [FAQ] Does TPLD have memory? What kind of memory does TPLD use?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ TPLD uses Floating-Gate One-Time Programmable (OTP) technology to program its parts, as opposed to other Non-Volatile Memory techniques such as eFuses or AntiFuses, or Volatile Memory technologies such as EEPROM or RAM. Floating…
    • 6 months ago
    • Logic
    • Logic forum
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  • Answered

    SN74HCS72: Holding a Data Bit into Latch 0 Locked

    190 views
    3 replies
    Latest 4 months ago
    by Clemens Ladisch
  • Suggested Answer

    SN74LVC04A:IC回路に関して 0 Locked

    352 views
    1 reply
    Latest 4 months ago
    by Clemens Ladisch
  • Suggested Answer

    SN74LVC1G125: Statistical Histograms of Voh at 100uA and 500uA 0 Locked

    117 views
    2 replies
    Latest 4 months ago
    by Clemens Ladisch
  • Suggested Answer

    SN74LVC1G123: timing resistor max 0 Locked

    97 views
    1 reply
    Latest 4 months ago
    by Clemens Ladisch
  • Suggested Answer

    SN74LVC7001A-Q1: AND Gate Inputs Tied Together 0 Locked

    162 views
    3 replies
    Latest 4 months ago
    by Clemens Ladisch
  • Suggested Answer

    SN74LVC2G74-Q1: CLOCK pin with PULLUP or PULLDOWN 0 Locked

    145 views
    3 replies
    Latest 4 months ago
    by Clemens Ladisch
  • Suggested Answer

    SN74HC08: Newest datasheet after PCN 0 Locked

    102 views
    1 reply
    Latest 4 months ago
    by Ian Graham
  • Suggested Answer

    SN74LVC2G14: VOH, VOL values for output pins 0 Locked

    103 views
    1 reply
    Latest 4 months ago
    by Ian Graham
  • Suggested Answer

    SN74LVC2G14: VIH, VIL values for input pins 0 Locked

    93 views
    1 reply
    Latest 4 months ago
    by Ian Graham
  • Not Answered

    SN74VMEH22501A: What would be the impact of leaving the B port signals floating? 0 Locked

    65 views
    1 reply
    Latest 4 months ago
    by Sudharsh Sriraman
  • Not Answered

    SN74AVC4T245-Q1: Request for Debug Support 0 Locked

    65 views
    1 reply
    Latest 4 months ago
    by Joshua Salinas
  • Not Answered

    SN74LVC1G34: SN74LVC1G34DCKT 0 Locked

    42 views
    1 reply
    Latest 4 months ago
    by Sudharsh Sriraman
  • Suggested Answer

    TXB0108: When using one direction fixed 0 Locked

    135 views
    4 replies
    Latest 4 months ago
    by Hiroaki Yuyama TED
  • Suggested Answer

    SN74LVC1G126: Unable to simulate the buffer with load switch 0 Locked

    194 views
    5 replies
    Latest 4 months ago
    by Albert Xu1
  • Not Answered

    SN74LVC1G08: Chip Orientation for Decapsulation procedure 0 Locked

    73 views
    1 reply
    Latest 4 months ago
    by Malcolm Lyn
  • Answered

    SN74121: 10s delay independent of trigger signal . 0 Locked

    218 views
    1 reply
    Latest 4 months ago
    by Malcolm Lyn
  • Answered

    SN74LVC2G157: Does it support 100 MHz CMOS/LVCMOS signals as inputs? 0 Locked

    144 views
    1 reply
    Latest 4 months ago
    by Clemens Ladisch
  • Answered

    SN74LVC573A:SN74LVC573 0 Locked

    157 views
    1 reply
    Latest 4 months ago
    by Malcolm Lyn
  • Answered

    SN74LVC245A: Conditions for mitigating overshoot 0 Locked

    80 views
    1 reply
    Latest 4 months ago
    by Clemens Ladisch
  • Suggested Answer

    SN74LVC244A: What's the internal pull up and pull down resistor value on output pin? 0 Locked

    168 views
    3 replies
    Latest 4 months ago
    by Clemens Ladisch
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