Tool/software:

Dear Technical Support Team,

I have been looking into the clock generator and jitter cleaner.

Input recovery clock from AMD FPGA SerDes…

Tool/software:

Hi,

My question is somewhat related to my previous query:

https://e2e.ti.com/support/clock-timing…

Tool/software:

Hello,

I am working on configuring my LMK03328 clock gen in TICS Pro. I am getting a harmonic crosstalk warning between some of my outputs. Is there a way to use these frequencies together so that crosstalk won't…

Tool/software:

Hello,

I am planning on using the LMK03328 in our design. I have some questions relating to the jitter performance. Is jitter performance different if I use a 100 MHz reference…

Tool/software:

Hello, TI's technical experts!

We have a project that uses LMK02338，as the input clock for FPGA and ADC.

This project has been mass-produced. There is a low probability (0.5%) that LMK02338 has no output. The…

Tool/software:

Dear Mr/Mrs,

I am targeting an LMK03328, assuming "hard pin mode".

I have following questions:

1) Upon low-to-high of pin PDN, the selected ROM page will be loaded. (See a.o figure 10-9 in datasheet).

Tool/software:

On behalf of a customer:

What are the guidelines for selecting the PFD frequency, loop filter settings, etc... in TICS Pro to achieve lowest possible phase noise…

Tool/software:

Hi,

I have a design with the LMK03328 which has an LVDS 20MHz primary input and a 10MHz crystal secondary input.

I have found that the "loss of signal" bits do not seem to do much, they are always 0 - the reference…

Tool/software:

Hi Team,

Please help to suggest a replacement for SI5332B.

Thanks.

Tool/software:

Hello Team,

I hope you are doing good. One of our customers bought 45 units of LMK03328RHST, and claim the housing pins have a striking structure as if the pin has a metallic grade. Please see the following pictures…

Tool/software:

Hello support team, 

I am using LMK03328 in my custom Intel board to provide free running clocks to different Intel FPGA Banks. I have put I2C header access to use USB2any…

Tool/software:

Hi support team,

Can I connect the I2C lines (SDA, SCL) of LMK03328 through pull-ups to a different power net than VDD_DIG when LMK03328 is no power supplied?

According to section 8.1 of the datasheet, the Abs Max…

Tool/software:

Team,

Could you check whether LMK03328 can support PCIe Gen5 or not? Thanks.

Tool/software:

Hi experts,

I have a question regard the INPUT CLOCK of LMK00308.

I am using 100MHz oscillator which will supply the PLL LMK03328.
This finally supply the 2ch CLOCK BUFFER…

Tool/software:

Hello expert,

May I know if LMK03328 EEPROM has default value? If yes, do you have default EEPROM code could share to us? And also, do you know how can register value converts to EEPROM file? Customer would like to…

Hi All,

A customer is considering LMX2820.
We are currently taking measures to reduce phase noise.
Among them, we are considering TI's oscillator for input…

Hello,

In my application, I have a clock with significant jitter. I need to double this clock and filter the jitter. I am currently prototyping on the LMK03328EVM development kit.

With my current settings, the LMK03328 provides …

Hi Team,

We have a CLK signal that would like to have SSC and so you use the part.

But the desired CLK signal amplitude are

- 1.5V 100M CLK

- 1.2V 100M CLK  

- 1.1V 100M CLK

But our CDCS501…

Hi Team

do we have any proper solution for SI52258A?

below is datasheet

0610-SILABS Si52258A-D01AMR.pdf

BRs

Brian

Hi,

In my application, I have a clock of around 70MHz. This clock has significant jitter. I need to double this clock and filter the jitter as much as possible.

I am struggling, however…

Hi,

In my application, I have 2 input clocks, only one of which is active at any given time, and 2 different output clocks which are always active.

I need to switch between input clocks…

I have a question about I2C access failures. In another thread, we found an I2C access failure event with a frequency of 1/1000.

LMK03328: POR spec - Clock & timing forum - Clock & timing - TI E2E support forums

We too have…

Hi all

Would you mind if we ask CDCE913?

<Question1>
Can CDCE913 start to operate with EEPROM register setting?
For example, LMK03328 has Hard Pin Mode (ROM) and Soft Pin Mode…

Kindly suggest Clock Synthesizer, where the following outputs shall be configured 125MHz, 100MHz, 156.25MHz (LVDS), 300MHz and 25MHz(LVCMOS). It shall be hard-coded and each outputs…

Hi  Team 

I have  downloaded  IBIS  model  form website , for  using with Hyperlynx  but  only  1.8 V output  models  are  available . If  same  model is  applicable  for  3.3V ? If  not  how  i  can  simulate  for  3.3V ?